What’s Next For IoT Security?

By Ed Sperling - 07 Nov, 2016 - Comments: 0

By Ed Sperling & Jeff Dorsch With security, the little things can cause as much of a problem as the big things. As shown in the recent distributed denial of service attack (DDoS) on Dyn, which created waves of attacks using Mirai malware, connected devices of all sizes can be amassed into an army of bots that can bring even giants like Amazon and Netflix to a dead stop. This attack was ... » read more

IC Industry Waking Up To Security

By Jeff Dorsch - 02 Jun, 2016 - Comments: 0

By Jeff Dorsch & Ed Sperling Many people pay lip service to the concept of security in Internet of Things devices, software, and networks. That oversight is beginning to fade away, however, as companies begin digging into one of the broadest and most complex problems in the IoT age. Unlike other technology issues, which have been solved in increments, security is all-inclusive. While ... » read more

Security Improvements Ahead

By Ed Sperling - 10 Nov, 2015 - Comments: 0

After nearly two years of talking about how security is one of the biggest problems facing the IoE, progress is being made on a number of fronts. The changes involve many companies, both individually and collaboratively through standards groups. And while none of this will stop the kind of high-profile breaches that affected Target or Home Depot or JPMorgan Chase or a long list of other gian... » read more

Newer posts →

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: TLS

What’s Next For IoT Security?

IC Industry Waking Up To Security

Security Improvements Ahead