New Interconnect Metals Need New Dielectrics


Just as circuit metallization must evolve to manage resistance as features shrink, so must the dielectric half of the interconnect stack. For quite some time, manufacturers have needed a dielectric constant (k) less than 4, which is the value for SiO2, but they have struggled to find materials that combine a low dielectric constant with mechanical and chemical stability. In work presented at... » read more

Chip Industry Week In Review


The University of Texas at Austin’s Texas Institute for Electronics (TIE) was awarded $840 million to establish a Department of Defense microelectronics manufacturing center. This center will focus on developing advanced semiconductor microsystems to enhance U.S. defense systems. The project is part of DARPA's NGMM Program. The U.S. Dept. of Commerce announced preliminary terms with Global... » read more

Intel Vs. Samsung Vs. TSMC


The three leading-edge foundries — Intel, Samsung, and TSMC — have started filling in some key pieces in their roadmaps, adding aggressive delivery dates for future generations of chip technology and setting the stage for significant improvements in performance with faster delivery time for custom designs. Unlike in the past, when a single industry roadmap dictated how to get to the next... » read more

CHIPS For America’s National Semiconductor Technology Center (NSTC) Program


At this year’s Design Automation Conference, Jay Lewis, director of CHIPS for America National Semiconductor Technology Center (NSTC) Program, gave a presentation on the status and direction of the Center, its priorities for this year and how the NSTC can change the long-term trajectory for innovation. Fig. 1: Dr. Jay Lewis, director of NSTC Program, CHIPS R&D Office at the Dept. o... » read more

Chip Industry Week In Review


The Design Automation Conference morphed into the Chips to Systems Conference, reflecting an industry shift from monolithic SoCs to assemblies of chiplets in various flavors of advanced packaging. The change drew a slew of students and a resurgent buzz, fueled by discussions about heterogeneous integration, reliability, and ways to leverage AI/ML to speed up design and verification processes. ... » read more

Opportunities Grow For GPU Acceleration


Experts at the Table: Semiconductor Engineering sat down to discuss the impact of GPU acceleration on mask design and production and other process technologies, with Aki Fujimura, CEO of D2S; Youping Zhang, head of ASML Brion; Yalin Xiong, senior vice president and general manager of the BBP and reticle products division at KLA; and Kostas Adam, vice president of engineering at Synopsys. W... » read more

Veterans Could Close The Semi Industry’s Workforce Gap


Veterans are beginning to form a valuable talent pool for advanced manufacturing and chip-sector positions, helping to fill the current and projected future gap in qualified workers as new fabs come online, and adding discipline and skills that are difficult to find otherwise. The job opportunities are many, and so are the possible job paths. In some cases, veterans are looking to make a qui... » read more

Chip Industry Week In Review


President Biden will raise the tariff rate on Chinese semiconductors from 25% to 50% by 2025, among other measures to protect U.S. businesses from China’s trade practices. Also, as part of President Biden’s AI Executive Order, the Administration released steps to protect workers from AI risks, including human oversight of systems and transparency about what systems are being used. Intel ... » read more

Chip Industry Week In Review


Synopsys refocused its security priorities around chips, striking a deal to sell off its Software Integrity Group subsidiary to private equity firms Clearlake Capital Group and Francisco Partners for about $2.1 billion. That deal comes on the heels of Synopsys' recent acquisition of Intrinsic ID, which develops physical unclonable function IP. Sassine Ghazi, Synopsys' president and CEO, said in... » read more

Chip Industry Week In Review


Samsung and Synopsys collaborated on the first production tapeout of a high-performance mobile SoC design, including CPUs and GPUs, using the Synopsys.ai EDA suite on Samsung Foundry's gate-all-around (GAA) process. Samsung plans to begin mass production of 2nm process GAA chips in 2025, reports BusinessKorea. UMC developed the first radio frequency silicon on insulator (RF-SOI)-based 3D IC ... » read more

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