The Three Consequences Of Fewer Design Starts

By Kurt Shuler
Gartner’s Feb. 27 report, “Market Trends: Worldwide, ASIC and ASSP Design Starts Continue Declining Trend, 2012,” by analysts Bryan Lewis and Ganesh Ramamoorthy, gives all of us insight into what the semiconductor world will look like a few years in the future.

Combined with Gartner’s reports on semiconductor design IP, we can gain an understanding of how the semiconductor trends will impact the IP business.

The Data: Design Starts, SoC Complexity, Commercial IP Growth
Bryan and Ganesh found that as the number of design starts in our semiconductor industry continues its slow, inexorable decline, the value, complexity and chip units per design are increasing.

Of course, this means the risks (and rewards) for each design increase, too.

• The number of design starts is shrinking:
o ASIC and ASSP design starts decreased by 2.3% from 2010 to 2011.
o Design starts are expected to decrease an average of 2.9% per year through 2016.

• Each design start is required to earn more revenue than before:
o ASICs earning greater than $30 million through their product life cycle increased to 11% in 2011, from 8 % in 2010.

• Each design start requires more volume to be profitable:
o ASIC designs with a product run of over 5 million units increased to 17% of all ASIC design starts in 2011, from 12% in 2010.

• Complexity is increasing for these designs:
o ASICs with a gate count greater than 60 million gates were 15% of the total in 2011, an increase from 12% in 2010.

• Commercial IP is growing as a percentage of all IP.

And we are not just talking ARM processor IP growth (more on this later).

The drivers for these data can be seen in the graph above from Gartner’s 1Q 2012 semiconductor forecast update webinar: The mobile device industry requires the latest semiconductor process technologies and the most complicated designs, especially for smartphone and tablet application processors.

All this leads me to three conclusions:

#1: Semiconductor Vendors will continue to Pursue Platform Strategies
With the cost of each design start increasing along with the required volume to earn a profit, semiconductor vendors must continue to create platforms, or families, of chips that share key ingredients. Usually, this means creating a single “mother” chip design, and basing a family of derivative designs upon it.

In the semiconductor world, we tend to think the value of this approach is because of the gains due to IP reuse. But IP reuse is only an enabler for the real reason: Software.
Each of these sophisticated SoCs requires a complete software offering, with much of it provided or enabled by the semiconductor vendor. In addition to the boot code and firmware that we are already familiar with, semiconductor vendors must provide OS drivers and hardware abstraction layer modifications, middleware, and even complete software application. All the software above the firmware layer is OS-dependent, so if you offer a chip that supports both Android and Windows 8, then you have twice the software work.

#2: Commercial design IP will continue to Grow, quickly
CPU cores were the first commercial IP products to be offered, pioneered by ARM. Then came memory controller IP (Cadence/Denali and Synopsys/Virage Logic) and GPU IP (Imagination Technologies). Now new types of IP are rapidly being adopted by the semiconductor industry.

After scrubbing through Gartner’s spreadsheets and survey reports, I was (pleasantly) surprised to find that chip infrastructure IP (of which SoC interconnect IP is a major portion) grew at a fast rate than the growth of CPU core IP and GPU IP.

This is great news for all IP vendors, not just the large incumbents!

#3: There will be a huge shakeout of mobile application processor vendors
It may take a couple of years, but there will be a big shakeout that will reshape our industry through mergers, acquisitions, and restructurings. Remember, these APs are what are driving the technology and economics of the semiconductor industry today, and each design carries immense risks and potential rewards.

There are three big AP providers today: Samsung (including the Apple Ax processors), Qualcomm and TI, plus newer market entrants like NVidia, Broadcom, Marvell and even many new Chinese companies. Each of these companies is trying to compete for high-end design wins. But as we have already seen through the trends in the Gartner data, the costs dictate that there can only be so many design wins at this level of complexity to allow an industry profit.

What this means is that we will all have a front seat to watch the theories of Adam Smith (the invisible hand of markets), Joseph Schumpeter (creative destruction) and Charles Darwin (evolution) play out in our industry. The structure of this industry dictates that it will likely converge to become an oligopoly, with a few large providers. This is similar to the DRAM market today.

The only thing that could forestall this shakeout and industry concentration is for all of us to keep innovating to maintain product differentiation and industry growth. I wish you all the best in doing your part!

Sources:
Gartner (Analysts: Bryan Lewis, Peter Middleton, and Jim Walker), presentation, “Gartner Webinar
Semiconductor Forecast: 1Q12 Update”, 8 March 2012

Gartner (Analysts: Bryan Lewis, Ganesh Ramamoorthy), report, “Market Trends: Worldwide, ASIC and ASSP Design Starts Continue Declining Trend, 2012”, 27 February 2012

Gartner (Analyst: Ganesh Ramamoorthy), report, “Survey Analysis: Semiconductor Design IP Revenue Grew by 23.5% in 2010”, 18 May 2011

Gartner (Analyst: Ganesh Ramamoorthy), spreadsheet, “Market Share: Semiconductor Intellectual Property, Worldwide, 2010”, May 2011

–Kurt Shuler is vice president of marketing at Arteris.