Too Soon For Wide I/O

By Ann Steffora Mutschler
When 3D ICs are prevalent, Wide I/O is sure to be there. But where does the technology stand today? Considering the amount of buzz and hype, it would be easy believe it is being implemented in production designs today.

Wide I/O is a very brute-force way of solving the problem of trying to get latency down with a high-speed memory interface, explained Navraj Nandra, director of analog/mixed signal marketing at Synopsys. “The way the industry has been going, it says, ‘Speeds are going up, the number of pins needs to be reduced, so let’s make the information serial.’ Wide I/O says if you’ve got some clever packaging techniques, maybe you can continue growing the number of pins to thousands of pins and you’ll solve the problems through TSVs (through silicon vias) and packaging.”

Theoretically, that approach is viable, he said, but the challenge is how to build a package that can support these thousands of pins and a manufacturing technology that is repeatable for all the TSVs.

None of the memory vendors Synopsys has spoken with are looking at developing a Wide I/O DRAM.

“That’s one of the problems—you’ve got people talking about a technology that can interface to a high speed memory bus using Wide I/O, which conceptually seems to be a good idea. But then the people that actually supply the DRAM are not embracing it yet. They may change their roadmaps, and if they do, we’ll have to rethink our strategy also because then there is a market for it,” Nandra said.

He’s not alone in that perception. “This is sort of like fuel cells: it’s Xanadu but it’s always at the very, very edge of peoples’ forecasts so it’s not quite reality,” said Mike Howard, principal analyst for DRAM and memory at IHS iSuppli. “While it’s gotten a little more realistic, it’s still a long way off. People talk about it largely because it looks like we might be facing some significant challenges as far as shrinking goes lithographically, but then you get TSV or Wide I/O and the sky’s the limit.”

Wide I/O has been talked about for a number of years, and if one memory company is talking about it then the competitors are compelled to talk about it with the same sort of enthusiasm and sense of immediacy. However, when pressed, the memory makers are looking at commercial viability in the 2014 to 2015 timeframe.

Howard expects Wide I/O to be applied to mobile technology initially because of power and bandwidth concerns. “You don’t have a lot of space so you can’t just stick more modules in to get the bandwidth that you want. These guys are really bandwidth constrained and power constrained and Wide I/O offers to address both of those issues.”

Conversely, Sam Caldwell, memory analyst at Semico Research, believes adoption of Wide I/O will be driven mostly by volume demand based on what applications utilize most of the DRAM, which would be desktops, workstations and notebooks. He doesn’t expect a big change in roadmaps from the likes of Intel and AMD, whose roadmaps are set in place for a number of years. “Until there is a large enough demand for it, the manufacturers are not going to switch manufacturing processes.”

He said that until 3D ICs are being manufactured and the players on the consumer side in the PC area—Intel and AMD, in particular—start looking at 3D ICs and interfacing with the technology they are putting into PCs, it’s just kind of off in the future a bit.

“The players that are developing 3D ICs are very hesitant to share any information, so it remains a gray area,” Caldwell added.

In addition to DRAM, memory makers are expected to implement Wide I/O in NAND. That’s where things could really get interesting, because in theory NAND and DRAM could be stacked in the same die or package, which would greatly benefit large vendors that make both—Samsung, Hynix and Micron.

“We’ll probably see Wide I/O implementations somewhere else [outside of memory],” Howard said. “It will start to trickle in more in niche products that are less cost-sensitive, probably manufactured on a wider lithography, because when you try to implement this on such fine pitch lithography you’ve got 10x the problem. I think we’ll probably see it bubble out somewhere else first, but that’s not really where it is interesting…it’s interesting when its driving a $40 billion business.”

Right now Wide I/O has been proven to work, but the costs remain too high—somewhere in the $300 per wafer area. Analysts say the price has to drop by a factor of 10, which it will when it hits volume manufacturing. But when that will happen isn’t certain yet.