April 2013 - Page 2 of 6 - Semiconductor Engineering

The Analyst View
By Kurt Shuler - 25 Apr, 2013 - Comments: 0

By Kurt Shuler I was fortunate to be able to meet with 13 different semiconductor industry analysts from eight different companies over the last two weeks. Our conversations ranged from the current state of the semiconductor industry to future software architecture trends. I want to take this opportunity to thank them once again for the exchange of ideas and the opportunity to learn from them.... » read more

The Power Treadmill
By Frank Ferro - 25 Apr, 2013 - Comments: 0

By Frank Ferro The recent purchase of an LTE smart phone has me back on my power management soapbox. I upgraded my phone about a month ago to the newest version (staying with the same manufacturer as my previous device) and to my dismay, although it wasn’t completely unexpected, the battery life was actually shorter. I did not do a ‘scientific’ comparison, but following the same daily us... » read more

Simple Economics
By Jon McDonald - 25 Apr, 2013 - Comments: 0

By Jon McDonald I was watching one of the MIT OpenCourseWare videos the other day. It was one of the lectures on Computer Science. I believe it was Prof. Robert Gallager who made a statement that really got me thinking: “Increasingly, system computational complexity has little impact on cost because of chip technology.” From a hardware perspective I initially had a bit of trouble with t... » read more

The Next Big Thing
By Ed Sperling - 25 Apr, 2013 - Comments: 0

The “next big thing” is always a collection of things—technologies that come together at the right moment to produce a wildly popular new product at a time when the market can consume it, build on it and truly recognize and leverage its value. What’s different about the Internet of Things is that, despite efforts to take control of it, there is no single owner, no company or even gr... » read more

Using Power Aware IBIS v5.0 Behavioral IO Models To Simulate Simultaneous Switching Noise
By Various Writers - 25 Apr, 2013 - Comments: 0

Typically simultaneous switching noise (SSN) transient simulations require significant CPU and RAM resources. A prominent factor affecting both CPU and RAM resource requirements is the number of MOSFET models included in the post layout extracted IO netlists. By replacing the IO netlists with power aware IBIS v5.0 behavioral models, both the CPU and RAM resource requirements are dramatically re... » read more

Clock Domain Crossing Demystified
By Various Writers - 25 Apr, 2013 - Comments: 0

A look at the second-generation solution for CDC verification. To download this white paper, click here. » read more

Virtual Prototypes: When, Where And How To Use Them
By Various Writers - 25 Apr, 2013 - Comments: 0

An innovation-hungry public and a highly competitive marketplace make for short product cycles, while the sophistication and performance expected of digital devices grows with every new product generation. Heterogeneous multiprocessing, where different cores do specialized work, has become the industry norm inside those devices, radically increasing the amount of software needed, the importance... » read more

Communicate, eXecute And Translate, Oh My!
By Various Writers - 25 Apr, 2013 - Comments: 0

This paper describes a model-driven development approach that leverages modeling efforts to validate functionality and transform high level models into forms that are useful at the next development step. It includes an example of one company's motivations for adopting such an approach, the methodology they adopted, and the value they found in using an MDD flow. To download this white paper,... » read more

Experts At The Table: Verification Nightmares
By Ed Sperling - 23 Apr, 2013 - Comments: 0

By Ed Sperling Low-Power Engineering sat down with Shabtay Matalon, ESL marketing manager in Mentor Graphics’ Design Creation Division; Bill Neifert, CTO at Carbon Design Systems; Terrill Moore, CEO of MCCI Corp., and Frank Schirrmeister, director of product marketing for system-level solutions at Synopsys. What follows are excerpts of that conversation. LPE: Where does power fit in? N... » read more

Subsystems And Reuse
By Frank Schirrmeister - 23 Apr, 2013 - Comments: 0

By Frank Schirrmeister The last couple of weeks have been very busy with travel, customer meetings and presentations—DATE in Grenoble, CDNLive in San Jose and, most recently, EDPS in Monterey. Software enablement and IP sub-systems have been the key themes throughout these events, and during Gary Smith’s keynote at EDPS, I realized that subsystem reuse may be a significant step to solving ... » read more

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