June 2013

Let’s All Meet At The Via Bar!

By Jean-Marie Brunet At 28 nm and below, a variety of new design requirements are forcing us to adjust the traditional layout and verification process of digital designs. The use of vias, in particular, has been significantly impacted. New via types have been introduced, and the addition of double patterning, FinFETS, and other new design techniques has not only generated a considerable increa... » read more

Experts At The Table: Performance Analysis

Low-Power/High-Performance Engineering sat down with Ravi Kalyanaraman, senior verification manager for the digital entertainment business unit at Marvell; William Orme, strategic marketing manager for ARM’s System IP and Processor Division; Steve Brown, product marketing and business development director for the systems and software group at Cadence; Johannes Stahl director of product market... » read more

Experts At The Table: SoC Prototyping

By Ann Steffora Mutschler System-Level Design sat down to discuss SoC prototyping with Hillel Miller, pre-silicon verification/emulation manager at Freescale Semiconductor; Frank Schirrmeister, group director, product marketing, for the system development suite at Cadence; and Mick Posner, director of product marketing at Synopsys. What follows are excerpts of that conversation. SLD: How... » read more

New Reliability Issues Emerge

By Ed Sperling Most consumers define reliability by whether a device turns on and works as planned, but the term is becoming harder to define as complexity increases and systems are interconnected. Adding more functionality in less space has made it more difficult to build complex chips, and it has made it more difficult to prevent problems in those chips. Verification coverage is a persist... » read more

The Ubiquitous GPU

By Ann Steffora Mutschler No matter the application area, GPUs are likely playing a role like never before—even to accelerate EDA software algorithms. It’s no wonder given the ability of GPUs to handle parallel processing much more effectively than CPUs. And when coexisting in a heterogeneous system, GPUs allow the design team to maximize efficiency and performance by allocating tasks... » read more

The New Verification Landscape

By Ann Steffora Mutschler Verification technologies and tools have never been more sophisticated. But putting together a methodology is more than just putting tools together. It starts with trying to get a handle on the complexity, knowing what to test, how to test and when. “UVM was standardized and people have been working to adopt that which has been generally a positive,” said Steve... » read more

Memory Gets Smarter

By Ed Sperling Look inside any complex SoC these days and the wiring congestion around memory is almost astounding. While the number of features on a chip is increasing, they are all built around the same memory modules. Logic needs memory, and in a densely packed semiconductor, the wires that connect the myriad logic blocks are literally all over the memory. This is made worse by the fact ... » read more

De-Mystifying The SoC Supply Chain

By Barbara Jorgensen At the heart of every supply chain operation is the desire to mitigate risk. In theory, a supply chain allows a customer to leverage the best of the best in technology, logistics or production at a lower cost than DIY (do it yourself.) The system on chip (SoC) supply chain is no different—there’s a whole ecosystem in the semiconductor industry that supports design, pro... » read more

A Team Is Only As Strong As Its Captain

By Tom De Schutter Last week I was in Cambridge, UK. Although the weather wasn’t great, which seems to be pretty standard every time I visit, it actually didn’t rain a whole lot. That was a victory in itself. On one of the evenings I was eating with some colleagues at a restaurant overlooking Parker’s Piece, a 25-acre square of grass near the center of Cambridge. Frequent visitors of ... » read more

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