July 2013 - Semiconductor Engineering


Blog Review: July 31


By Ed Sperling Wherever you turn in IC design, there’s always someone talking about future problems involving the interconnect. Cadence’s Brian Fuller puts the latest speech by North Carolina State professor Paul Franzon in historical perspective—or at least in the shadow of the last dire prediction by Intel’s Mark Bohr two decades ago. Incidentally, Bohr’s warning turned out to be r... » read more

System Bits: July 30


Controlling nanomaterials To find out why some sets of flat nanocrystals arrange themselves in an alternating, herringbone style even though it wasn’t the simplest pattern, University of Pennsylvania researchers turned to experts in computer simulation at the University of Michigan and the Massachusetts Institute of Technology. The result of the collaboration gives nanotechnology research... » read more

Garbage Or Treasure?


By Jon McDonald “Garbage in, garbage out” is a very appropriate axiom to keep in mind as you consider what kind of system-level modeling to invest in. Unfortunately this can be complicated by considering another piece of wisdom that often applies as well: “One mans trash is another’s treasure.” What might be an inappropriate abstraction for one type of analysis may be very accepta... » read more

FPGA Verification with Assertions: Why Bother?


This paper provides a practical, easy, step-by- step set of instructions on how to add assertions to your RTL design. By following the simple guidelines provided in this paper you will benefit by cutting simulation debugging time in half, as well as finding very complex bugs that are likely to escape traditional simulation without assertions. To download this white paper, click here. » read more

EM Analysis At Advanced Nodes


Going forward, a very different method of EM assessment can be proposed if we look at interconnect reliability from the position of its functionality, when the failure of the interconnect means its inability to function properly. The two most important functions of the chip interconnect are: Providing connectivity between different parts of design for proper signal propagations (signal circ... » read more

Materials, Software And Techniques


The future of advanced semiconductor technology is about to split evenly into three different areas. On the leading edge of manufacturing, Applied Materials CEO Mike Splinter called it correctly—it’s all about materials. Just shrinking features isn’t buying much anymore. In fact, at advanced nodes, with extra margin built into designs, it frequently doesn’t buy anything except extra ... » read more

Experts At The Table: Who Pays For Low Power?


By Ed Sperling Low-Power/High-Performance Engineering sat down to discuss the cost of low power with Fadi Gebara, research staff member for IBM’s Austin Research Lab; David Pan, associate professor in the department of electrical and computer engineering at the University of Texas; Aveek Sarkar, vice president of product engineering and support at Apache Design; and Tim Whitfield, director ... » read more

The Week In Review: July 26


By Ed Sperling Cadence’s Q2 revenue increased 11% to $362 million compared to $326 million in the same period in 2012. On a GAAP basis, net income dropped to $9 million compared with $36 million in 2012, but that decrease was impacted by the cost of recent acquisitions and integration of companies. On a non-GAAP basis, income was $61 million compared with $53 million in Q2 2012. Dassault... » read more

System-Level Security Issues


The more things that are put onto a single SoC, the greater the possibility that the entire system can be hacked. Centralization is good from the standpoint of speed, cost and power, but it’s not always good from the standpoint of security. This may sound contrary to the experience of corporate IT departments, but there’s a reason behind this. In the case of data centers, the advent of t... » read more

Reduce, Reuse, Recycle


By Neil Hand I’m not talking about how to make more environmentally friendly products, because let’s face it, the gadgets we love are monsters when it comes to environmental impact. I’m referring to the ideals of environmentalism and how those can be applied in a system-design context. Reduce, Reuse, Recycle This is the mantra you see everywhere and it maps very well into the system ... » read more

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