February 2016 - Page 2 of 10 - Semiconductor Engineering


Masters Of Abstraction


Good system designers are a unique breed. While it's easy enough to distinguish the traits that define a good one from a weak one, it's much harder to determine who possesses those traits before they are put to the test, or whether or how they can be taught. However, there is definitely a particular perspective that good system designers hold in common. The key is the ability to work with ma... » read more

Can You Really Fry an Egg on a CPU?


Solving complex thermal models with computational fluid dynamics (CFD) requires a lot of processing power, and a central processing unit (CPU) under full load generates a fair amount of heat. But can you cook an egg on it? Search online and you can find videos of people attempting to cook on their processors—I wouldn’t recommend this as a cooling solution. However, just out of curiosity, I ... » read more

Robotics: Let The Games Begin


Right before the year-end holidays I posted a blog about a robot competition under Science Fair – Redefined. I am happy to report that the team we’re sponsoring – The Chargers – are putting the finishing touches on their robot entry to the competition. The games will begin soon. I continue to be amazed at the sophistication and complexity of this process, as I only have my high school s... » read more

Advancing SoC Technology


As chip designers, we take logic synthesis for granted. It’s hard to imagine the days when engineers had to design digital logic by hand. But then, it’s no less mind-boggling to believe that NASA engineers used slide rules to calculate and plan the Apollo 11 mission that first landed on the moon. Were engineers just a whole lot smarter in the old days? Maybe. But it’s also true that c... » read more

The Ultimate Shift Left


Albert Einstein defined it well: “Insanity is doing the same thing over and over again and expecting different results.” I have come across several semiconductor development teams, especially those in Fortune 500 companies, who do not have time to change their design process. They often cite various reasons such as: • Too busy with the current project. • What we have is working, so... » read more

Getting Formal About Debug


While much of the design and verification flows have been automated, debug remains the problem child. It has defied automation and presents a management nightmare due to the variability of the process. In recent articles about debug, we examined how much time development teams spend in the debug process and some of the reasons why it is becoming a bigger problem. This includes issues such as ex... » read more

Education And Communication


With the System Development Suite introduced back in 2011, it is worthwhile to review how the adoption of the connected verification engines has progressed. It turns out that only part of the issues to be solved are purely technical. Communication across different technology areas is key, and with that, education of a new breed of engineer may become a key issue going forward. As a son of a ... » read more

Techno-Morality Is Our Concern


A decade or so ago, [getentity id="22035" e_name="Synopsys"] Chairman of the Board and co-CEO [getperson id="11034" comment="Aart de Geus"] gave a bunch of talks about the importance of Techonomics. Fundamentally this was about the merging of technology and business economics. De Geus saw that we were entering a period of connected everything, and that devices increasingly would be driven by in... » read more

Talk Fast And Stop


Power management. If you’re responsible for the design of low-power, energy-efficient electronic systems and SoCs, you need to have a power management strategy and you need to know as soon as possible if it will meet the demands of your product and its target applications. For example, dynamic voltage and frequency scaling (DVFS) is a power management strategy that adjusts the frequency an... » read more

UVM: It’s Organized And Systematic


One of the reasons I like using UVM is its tendency toward an organized structure and uniformity. Some may find it annoying to adhere to such a strict format in UVM, but I think it’s a good way to keep the basics of UVM engrained in your brain. You always want a good foundation and development of strong fundamentals in any endeavor. Verification is no different and UVM hammers the fundamental... » read more

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