Author's Latest Posts


Which Foundry Is In The Lead? It Depends.


The multi-billion-dollar race for foundry leadership is becoming more convoluted and complex, making it difficult to determine which company is in the lead at any time because there are so many factors that need to be weighed. This largely is a reflection of changes in the customer base at the leading edge and the push toward domain-specific designs. In the past, companies like Apple, Google... » read more

Testing 2.5D And 3D-ICs


Disaggregating SoCs allows chipmakers to cram more features and functions into a package than can fit on a reticle-sized chip. But as Vidya Neerkundar, technical marketing engineer at Siemens EDA explains, there are challenges in accessing all of the dies or chiplets in a package. The new IEEE 1838 standard addresses that, as well as what to do when 2.5D and 3D-ICs are combined together in the ... » read more

Why Changes In Computing Are Driving Changes In Photomasks


Aki Fujimura, CEO of D2S, talks with Semiconductor Engineering about massive improvements in computation based upon increased density on chips, and why printing Manhattan shapes on a photomask are no longer sufficient to print high-performance devices with predictable reliability every time. He explains why a discontinuity in EDA physical design has opened the door for printing curvilinear shap... » read more

EDA, IP Revenue Way Up


EDA and semiconductor IP sales grew 17.5% to $3.75 billion in Q2, the highest growth in more than a decade, fueled by more complex designs and the need for advanced design and verification tools. Demand for nearly every segment tracked in SEMI's Electronic Design Market Data (EDMD) report was up, including services, which grew 23.2% in Q2 — the most recent statistics available in. That cou... » read more

HBM3 In The Data Center


Frank Ferro, senior director of product management at Rambus, talks about the forthcoming HBM3 standard, why this is so essential for AI chips and where the bottlenecks are today, what kinds of challenges are involved in working with this memory, and what impact chiplets and near-memory compute will have on HBM and bandwidth.     » read more

Simplifying AI Edge Deployment


Barrie Mullins, vice president of product at Flex Logix, explains how a programmable accelerator chip can simplify semiconductor design at the edge, where chips need to be high performance as well as low power, yet developing everything from scratch is too expensive and time-consuming. Programmability allows these systems to stay current with changes in algorithms, which can affect everything f... » read more

IC Architectures Shift As OEMs Narrow Their Focus


Diminishing returns from process scaling, coupled with pervasive connectedness and an exponential increase in data, are driving broad changes in how chips are designed, what they're expected to do, and how quickly they're supposed to do it. In the past, tradeoffs between performance, power, and cost were defined mostly by large OEMs within the confines of an industry-wide scaling roadmap. Ch... » read more

Using eFPGAs For Security


Andy Jaros, vice president at Flex Logix, talks about the use of eFPGAs to keep pace with security risks over longer chip lifetimes, how configurable RTL can help, and why systems companies are altering the playing field for FPGAs. » read more

10 Questions: Handel Jones


Handel Jones, CEO of International Business Strategies and author of a new book, "When AI Rules The World," sat down with Semiconductor Engineering to talk about the growth and impact of AI. What follows are excerpts of that conversation. SE: What do you see as the impact of AI on semiconductors? Jones: The fact that you have a 5G smart phone is because of AI. Steve Jobs changed the smart... » read more

How To Compare Chips


Traditional metrics for semiconductors are becoming much less meaningful in the most advanced designs. The number of transistors packed into a square centimeter only matters if they can be utilized, and performance per watt is irrelevant if sufficient power cannot be delivered to all of the transistors. The consensus across the chip industry is that the cost per transistor is rising at each ... » read more

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