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130 BCDLite And BCD


BCDLite and BCD process technologies offer a modular platform architecture based on the Globalfoundries’s low-power logic process with integrated low- and high-voltage bipolar transistors, high-voltage EDMOS/LDMOS transistors, precision analog passives and non-volatile memory. • New Gen2 release with significant performance improvements • BCDLite is tailored for cost-effective mobil... » read more

FD-SOI: How Body Bias Creates Unique Differentiation


Fully depleted silicon-on-insulator (FD-SOI) relies on a very unique substrate whose layer thicknesses are controlled at the atomic scale. FD-SOI offers remarkable transistor performance in terms of power, performance, area and cost tradeoffs (PPAC), making it possible to cover from low-power to high-performance digital applications with a single technology platform. FD-SOI delivers numerous un... » read more

Matching Between Simulations and Measurements As a Key Driver for Reliable Overlay Target Design


By S. Lozenko, B. Schulz, L. Fuerst, C. Hartig, and M. Ruhm of GlobalFoundries and T. Shapoval, G. Ben-Dov, Z. Lindenfeld,  R. Haupt, and R. Wang of KLA-Tencor Abstract Numerical simulation of overlay metrology targets has become a de-facto standard in advanced technology nodes. While appropriate simulation software is widely available in the industry alongside with metrics that allow sel... » read more

180nm HVIC Technology for Digital AC/DC Power Conversion


This paper presents a new high-voltage integrated circuit (HVIC) technology that is optimized for AC/DC power conversion applications with increased digital content. The cost-effective process uses 3.3V CMOS and a 180nm backend process to provide about 10X greater digital circuit density compared with conventional 0.5μm 5V CMOS solutions while maintaining excellent analog circuit performance. ... » read more

CMOS-Embedded STT-MRAM Arrays In 2xnm Nodes For GP-MCU Applications


Perpendicular Spin-Transfer Torque (STT) MRAM is a promising technology in terms of read/write speed, low power consumption and non-volatility, but there has not been a demonstration of high density manufacturability at small geometries. In this paper we present an unprecedented demonstration of a robust STT-MRAM technology designed in a 2x nm CMOS- embedded 40 Mb array. Key features are full a... » read more

CMOS-Embedded STT-MRAM Arrays In 2xnm Nodes For GP-MCU Applications


Perpendicular Spin-Transfer Torque (STT) MRAM is a promising technology in terms of read/write speed, low power consumption and non-volatility, but there has not been a demonstration of high density manufacturability at small geometries. In this paper we present an unprecedented demonstration of a robust STT-MRAM technology designed in a 2x nm CMOS- embedded 40 Mb array. Key features are full a... » read more

CMOS-Embedded STT-MRAM Arrays In 2x nm Nodes For GP-MCU Applications


Perpendicular Spin-Transfer Torque (STT) MRAM is a promising technology in terms of read/write speed, low power consumption and non-volatility, but there has not been a demonstration of high density manufacturability at small geometries. In this paper we present an unprecedented demonstration of a robust STT-MRAM technology designed in a 2x nm CMOS- embedded 40 Mb array. Key features are full a... » read more