Author's Latest Posts


Power/Performance Bits: March 27


Equalizing batteries Engineers at the University of Toledo propose a bilevel equalizer technology to improve the life span of batteries by combining the high performance of an active equalizer with the low cost of a passive equalizer. "Whenever we are talking about batteries, we are talking about cells connected in a series. Over time, the battery is not balanced and limited by the weakest ... » read more

The Week In Review: Design


M&A Synopsys acquired Silicon and Beyond, a provider of high-speed SerDes and ADC/DAC IP. The company was founded in 2012 as SilabTech and headquartered in Bangalore. Synopsys highlighted the team of R&D engineers with high-speed SerDes expertise that would be joining with the acquisition. Terms of the deal were not disclosed. ANSYS will acquire OPTIS, a provider of software for sci... » read more

Blog Review: Mar. 21


Mentor's Colin Walls shares five more quick tips for embedded software programming, including t real time systems, programming philosophy, and C++ operator overloading. Cadence's Paul McLellan digs into recently released semiconductor company ratings, the role of memory in shaking up the list, and China's plans for more 3D NAND and DRAM fabs. Synopsys' Taylor Armerding examines the latest... » read more

Power/Performance Bits: Mar. 20


Proton battery prototype A team at RMIT University built a prototype rechargeable proton battery combining hydrogen fuel cells and battery-based electrical power that has the potential, with further development, to store more energy than currently-available lithium ion batteries. The working prototype proton battery uses an activated carbon electrode for solid-state storage of hydrogen with... » read more

The Week In Review: Design


Tools Synopsys debuted new versions of its circuit simulation and custom design products. FineSim SPICE provides 2X faster simulation and Monte Carlo analysis speed, CustomSim FastSPICE offers 2X speed-up for post-layout SRAM simulation and maintains multi-core scalability by providing additional 2X speed-up on four cores, and HSPICE delivers 1.5X speed-up for large post-layout designs, accord... » read more

Blog Review: Mar. 14


Cadence's Meera Collier considers the issues of bias implementation in algorithms and AI systems, and whether immense training sets can really solve the problem. Mentor's Cristian Filip digs into the evolution of signal integrity analysis methods and why different data rates require different solutions. Synopsys' Naveen G explains key features introduced in the latest generation of interc... » read more

Power/Performance Bits: Mar. 13


Wireless charging Engineers at the University of Washington developed a method to safely charge a smartphone wirelessly using a laser, potentially as quickly as a standard USB cable. Safety features of the system include a reflector-based mechanism to shut off the laser and heatsinks. The charging beam is generated by a laser emitter that the team configured to produce a focused beam in the... » read more

The Week In Review: Design


M&A Microchip inked an agreement to acquire Microsemi, provider of chips for defense and aerospace, for $68.78 per share in cash. The acquisition price represents a total equity value of about $8.35 billion and a total enterprise value of about $10.15 billion, according to Microchip. The deal is expected to close in the second quarter of 2018. Silvaco acquired NanGate. Founded in 2004, ... » read more

Blog Review: Mar. 7


Synopsys' Amit Paunikar and Shaily Khare take a look at new features in LPDDR5, from improved data bandwidth and Deep Sleep Mode to WCK clock. Cadence's Paul McLellan dives into forward error correction, a technique for automatically correcting errors in transmitted network data, with a look at why it's important and how it works. In his latest embedded software video, Mentor's Colin Wall... » read more

Power/Performance Bits: Mar. 6


Neural network chip Neural networks are both slow and consume a lot of power. This made researchers at MIT examine the important aspects of the nodes within a neural network and to see how each part of the computation could be improved. The outcome was a dedicated chip that increases the speed of neural-network computations by three to seven times over its predecessors, while reducing power c... » read more

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