Blog Review: Mar. 14

Bias in AI; changing SI analysis; MIPI UniPro updates; DoD’s cybersecurity challenges.


Cadence’s Meera Collier considers the issues of bias implementation in algorithms and AI systems, and whether immense training sets can really solve the problem.

Mentor’s Cristian Filip digs into the evolution of signal integrity analysis methods and why different data rates require different solutions.

Synopsys’ Naveen G explains key features introduced in the latest generation of interconnect specification MIPI UniPro v1.8 and its physical layer MIPI M-PHY v4.1, as well as how it enables UFS 3.0 to achieve up to 23Gbps.

Rambus’ Aharon Etengoff points to the U.S. Department of Defense’s concerns regarding IoT and other cybersecurity threats, from eavesdropping smart TVs to imported cell phones.

Writing for SEMI, Vesper Technologies’ Matt Crowley argues that piezoelectric MEMS microphones are set to improve the capabilities of smart speakers through lower power consumption, improved accuracy, and durability.

Arm’s Timothy Duthie presents an embedded software tutorial on using Arm’s Compiler 6 toolchain for retargeting and enabling exceptions with an ELF image.

Nvidia’s Tonie Hansen checks out research on using GPUs for more precise tsunami early warning systems by simulating how a tsunami will evolve faster than it happens in the real world.

Sondrel’s Andrew Miles explores how the Earned Value Management project management technique can help manage the cost of design projects.

Synopsys’ Taylor Armerding explains the recent record-breaking 1.35 TB DDoS attack against code repository GitHub, using Memcached servers, and why it shouldn’t have been possible.

Cadence’s Madhavi Rao listens in on a panel discussion about the future of fabless chip design in India, opportunities that make the market unique, and what could push it forward.

In a podcast, Mentor’s John McMillan proposes seven habits that successful PCB designers exhibit when they study, prepare, visualize, strategize, and complete PCB designs.

Plus, check out the latest blogs from last week’s Low Power-High Performance newsletter:

Editor In Chief Ed Sperling predicts that the revolution that started in mobile phones will continue in other devices, only much faster.

Executive Editor Ann Steffora Mutschler finds the combination of heterogeneous architectures and RISC-V is driving support for new tools.

Mentor’s Progyna Khondkar takes a deep dive into the foundations of PA static verification and the solution features used for its verification.

Synopsys’ Rita Horner shows how to successfully design systems with the new PCIe 5.0 interface.

Fraunhofer’s Benjamin Prautsch and Torsten Reich observe that aggregating data is the basis of modern production systems, and it needs to be considered from system requirement to analog layout.

Rambus’ Steven Woo points to different architectures to get around the memory bottleneck.

ANSYS’ Allen Baker questions whether today’s vast and power hungry computational landscape is sustainable.

Cadence’s Dave Stratman examines why design flows are so important for getting the low-power/high-performance benefits of the latest nodes.

Arm’s Ian Forsyth looks at the role of efficient inferencing in moving machine learning forward.

Helic’s Magdy Abadir and Yehea Ismail note that utilizing inductance rather than trying to suppress it can have a significant impact on leading-edge designs.

ANSYS’ Annapoorna Krishnaswamy examines how to get from where we are today to fully autonomous vehicles.

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