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Jesse Allen

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Jesse Allen is the Knowledge Center administrator and a senior editor at Semiconductor Engineering.

Author's Latest Posts

Week In Review: Design, Low Power
By Jesse Allen - 16 Jul, 2021 - Comments: 0

Tools Andes Technology certified Imperas reference models for the complete range of Andes IP cores with the new RISC-V P SIMD/DSP extension. The reference models can be used to evaluate multicore design configuration options for SoC architecture exploration and support early software development before silicon prototypes are available. Cadence's digital full flow was optimized and certified... » read more

Blog Review: July 14
By Jesse Allen - 14 Jul, 2021 - Comments: 0

Siemens EDA's Wei-Lii Tan considers the tradeoffs when running library characterization in the cloud and how to think about running CPUs in parallel, the cost of throughput, and runtime reductions. A Synopsys writer checks out the reduced blanking feature in HDMI 2.1, which can help reduce the transmission rate while keeping the resolution and refresh rate intact for higher resolution displa... » read more

Power/Performance Bits: July 13
By Jesse Allen - 13 Jul, 2021 - Comments: 0

Graphene PUFs Researchers at Pennsylvania State University propose using graphene to create physically unclonable functions (PUFs) that are energy efficient, scalable, and secure against AI attacks. The team first fabricated nearly 2,000 identical graphene transistors. Despite their structural similarity, the transistors' electrical conductivity varied due to the inherent randomness arising... » read more

Week In Review: Design, Low Power
By Jesse Allen - 09 Jul, 2021 - Comments: 0

Tools Aldec extended its TySOM family of embedded prototyping boards with the introduction of TySOM-M-MPFS250, the first in a planned series to feature a Microchip PolarFire SoC FPGA MPFS250T-FCG1152 and to have dual FMC connectivity. The board contains 16Gb FPGA DDR4 x32, 16Gb MSS DDR4 x36 with ECC, eMMC, SPI Flash memory, 64 Kb EEPROM and a microSD card socket. The PolarFire SoC is a five-st... » read more

Startup Funding: June 2021
By Jesse Allen - 07 Jul, 2021 - Comments: 0

June was the month of mega-rounds for autonomous driving companies, with three pulling in well over $100M. All three are based in China, but their products range from chips to full robotaxi services. Also in the automotive space, an EV battery manufacturer raised over $2B, a solid-state lidar developer drew $300M — and those are just the largest rounds. Plus, new HPC architectures, GAA metrol... » read more

Blog Review: July 7
By Jesse Allen - 07 Jul, 2021 - Comments: 0

Cadence's Sangeeta Soni provides a primer on the PIPE SerDes architecture and some of the changes that can introduce verification challenges for SerDes compliant PHY and MAC devices. Siemens EDA's Chris Spear demystifies the $cast() method in SystemVerilog, which checks values at runtime rather than compile time, and gives some examples of when it is useful. Synopsys' Chris Clark warns th... » read more

Week In Review: Design, Low Power
By Jesse Allen - 02 Jul, 2021 - Comments: 0

Tools Imperas and Valtrix inked a multi-year distribution and support agreement that makes Imperas simulation technology and RISC-V reference models available pre-integrated within Valtrix STING for RISC-V processor verification. The combined solution covers the full RISC-V specification for user, privilege, and debug modes, including all ratified standard extensions, and the near ratified (st... » read more

Blog Review: June 30
By Jesse Allen - 30 Jun, 2021 - Comments: 0

Siemens EDA's Chris Spear considers what classes should represent in SystemVerilog and offers two major categories along with some helpful UVM tips. Cadence's Paul McLellan listens in on keynotes at the recent TSMC Technology Symposium, including TSMC CEO C. C. Wei's introduction some of the fab's new offerings, such as an automotive-focused N5 process. Synopsys' Dennis Kengo Oka notes th... » read more

Power/Performance Bits: June 29
By Jesse Allen - 29 Jun, 2021 - Comments: 0

Persistent photoconductivity Researchers at the U.S. Department of Energy's National Renewable Energy Laboratory (NREL), University of Wisconsin Madison, and the University of Toledo, discovered a unique effect in metal-halide perovskite semiconductors that could be used in neuromorphic computing systems. Perovskites are currently being investigated as highly efficient solar cells. In fact,... » read more

Week In Review: Design, Low Power
By Jesse Allen - 25 Jun, 2021 - Comments: 0

Synopsys will acquire the semiconductor and flat panel display solutions of BISTel. The acquisition will add an integrated and comprehensive yield management and prediction solution for manufacturing quality and efficiency. BISTel provides engineering equipment systems and AI applications for smart manufacturing in a range of industries. "Combining Synopsys' and BISTel's expertise in fab soluti... » read more

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