Blog Review: Nov. 3

Security increasingly vital; the chips behind YouTube; UPF basics; bugs and architectures.


In a blog for Arm, Matthew Griffin of the 311 Institute warns that cybersecurity is an increasingly pressing problem, with large criminal organizations raking in large sums of money and attacks able to impact a wide range of physical systems.

Cadence’s Paul McLellan checks out Google’s video encoder chip and how it helps lower the CPU recycles required by the vast number of videos uploaded to YouTube every minute.

Synopsys’ Nikhil Amin and Harsha Vardhan explain the basics of UPF, its importance in the power landscape, how to expand low-power signoff with custom mechanisms, and how to approach things like hard RAM and hard macro where the connectivity of low-power control signals is unclear.

In a blog for Siemens, EmLogic’s Espen Tallaksen argues that many FPGAs and ASICs could be designed more efficiently and with fewer bug iterations at all levels if more attention is paid to creating a good design architecture from the outset.

Coventor’s Timothy Yang uses process modeling to identify an ALD thickness that minimizes the type of pattern offset and device non-uniformity that can be caused by self-aligned quadruple patterning.

The ESD Alliance’s Bob Smith chats with Chin-Chi Teng of Cadence about how machine learning is changing EDA and the semiconductor industry, the role of the cloud, and how engineering students can make the most of ML opportunities.

A Rambus writer identifies the major changes in DDR5 and the new signal integrity challenges introduced by higher speeds and lower voltages.

Ansys’ Jingchen Liang explains how to simulate and perform electromagnetic analysis on inductive wireless charging systems.

Nvidia’s Vanessa Braunstein points to the scale of edge computing and AI in healthcare, with 30% of all stored data from health and life sciences, 10 to 15 edge devices per hospital bed, and a big jump in the global market for connected medical devices.

And don’t miss the blogs featured in the latest Systems & Design newsletter:

Technology Editor Brian Bailey argues that while no tool lasts forever, sometimes you get blindsided by the changes you can’t anticipate.

Cadence’s Frank Schirrmeister stresses that planning and analyzing fault campaigns holistically are key in safety design.

Siemens EDA’s Neil Hand says the cost of complexity calls for a change in the way we think of verification.

Synopsys’ Anika Malhotra looks at using AI techniques to determine which constrained random tests are most effective for improving coverage.

Codasip’s Roddy Urquhart shows a way to add custom instructions to a processor without error-prone manual editing.

Siemens EDA’s Rob van Blommestein talks about OneSpin’s Osmosis, sharing information, and pushing the boundaries of formal verification.

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