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Jesse Allen

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Jesse Allen is the Knowledge Center administrator and a senior editor at Semiconductor Engineering.

Author's Latest Posts

Power/Performance Bits: March 16
By Jesse Allen - 16 Mar, 2021 - Comments: 0

Adaptable neural nets Neural networks go through two phases: training, when weights are set based on a dataset, and inference, when new information is assessed based on those weights. But researchers at MIT, Institute of Science and Technology Austria, and Vienna University of Technology propose a new type of neural network that can learn during inference and adjust its underlying equations to... » read more

Week In Review: Design, Low Power
By Jesse Allen - 12 Mar, 2021 - Comments: 0

Tools & IP Codasip unveiled three commercially licensed add-ons to the Western Digital SweRV Core EH1, aiming to allow it to be designed into a wider range of applications. The SweRV Core EH1 is a 32-bit, dual-issue, RISC-V ISA core with a 9-stage pipeline, open-sourced through CHIPS Alliance. The add-ons offer a floating-point unit (FPU) that supports the RISC-V single precision [F] and d... » read more

Blog Review: March 10
By Jesse Allen - 10 Mar, 2021 - Comments: 0

Siemens EDA's Harry Foster checks out how the maturity of verification processes impact bug escapes in FPGA designs and whether safety critical development processes prevent bugs from escaping to silicon. Synopsys' Dennis Kengo Oka examines the weaknesses and vulnerabilities in automotive keyless entry systems and how security researchers hacked the Tesla Model X key fob. Cadence's Paul M... » read more

Power/Performance Bits: March 8
By Jesse Allen - 08 Mar, 2021 - Comments: 0

Non-toxic, printable piezoelectric Researchers at RMIT University and University of New South Wales developed a flexible and printable piezoelectric material that could be used in self-powered electronics including wearables and implantables. "Until now, the best performing nano-thin piezoelectrics have been based on lead, a toxic material that is not suitable for biomedical use," said Dr N... » read more

Week In Review: Design, Low Power
By Jesse Allen - 05 Mar, 2021 - Comments: 0

Tools Synopsys introduced Euclide, a next-generation hardware description language (HDL)-aware integrated development environment (IDE). Euclide aims to enable earlier detection of bugs and optimize code for design and verification flows by identifying complex design and testbench compliance checks during SystemVerilog and UVM development. It assists correct-by-construction code development th... » read more

Blog Review: March 3
By Jesse Allen - 03 Mar, 2021 - Comments: 0

Siemens EDA's Ray Salemi considers incrementalism in engineering, the transition from drawing circuits to writing RTL, and the next big leap of using proxy-driven testbenches written in Python. Cadence's Shyam Sharma looks at key changes from LPDDR5 in the LPDDR5X SDRAM standard, which extends clock frequencies to include 937MHz and 1066MHz resulting in max data rates of 7500MT/s and 8533 MT... » read more

Power/Performance Bits: March 2
By Jesse Allen - 02 Mar, 2021 - Comments: 0

Fast-charging EV battery Electric vehicle adoption faces challenges from consumers' range anxiety and the extended lengths of time needed to charge a car's battery. Researchers at Pennsylvania State University are trying to address this by developing lithium iron phosphate EV batteries that have a range of 250 miles with the ability to charge in 10 minutes. It also is expected to have a lifeti... » read more

Startup Funding: February 2021
By Jesse Allen - 01 Mar, 2021 - Comments: 0

In February, several startups emerge from stealth, with one company working on AI inference architectures for the data center and another trying to make lenses thinner by patterning surfaces with tiny structures. Two new Chinese companies are trying to expand the country's semiconductor design ecosystem with GPUs and interface IP. Plus, a maker of AI chips for ADAS draws another massive round t... » read more

Week In Review: Design, Low Power
By Jesse Allen - 26 Feb, 2021 - Comments: 0

Cadence completed the acquisition of NUMECA International, a provider of computational fluid dynamics (CFD), mesh generation, multi-physics simulation, and optimization solutions for industries including aerospace, automotive, industrial, and marine. Founded in 1993 as a spin-off of the Vrije Universiteit Brussel (VUB), NUMECA was based in Brussels, Belgium. Terms of the deal were not disclosed... » read more

Blog Review: Feb. 24
By Jesse Allen - 24 Feb, 2021 - Comments: 0

Siemens EDA's Harry Foster checks out the efficiency and effectiveness of verification on ASIC and IC designs with a look at how many projects meet the original schedule, the number of required spins, and classification of functional bugs. Cadence's Paul McLellan listens in as Philippe Magarshack of ST Microelectronics on how the company uses massive amounts of data generated by its fabs to ... » read more

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