Alternative Text

Jesse Allen

  (all posts)
Jesse Allen is the Knowledge Center administrator and a senior editor at Semiconductor Engineering.

Author's Latest Posts

Power/Performance Bits: Dec. 4
By Jesse Allen - 04 Dec, 2018 - Comments: 0

Bio-hybrid fungi Researchers at Stevens Institute of Technology combined a white button mushroom, electricity-producing cyanobacteria, and graphene nanoribbons into a power-generating symbiotic system. "In this case, our system - this bionic mushroom - produces electricity," said Manu Mannoor, an assistant professor of mechanical engineering at Stevens. "By integrating cyanobacteria that ca... » read more

Week In Review: Design, Low Power
By Jesse Allen - 30 Nov, 2018 - Comments: 0

Tools & IP UltraSoC debuted functional safety-focused Lockstep Monitor, a set of configurable IP blocks that are protocol aware and can be used to cross-check outputs, bus transactions, code execution, and register states between two or more redundant systems. It supports all common lockstep / redundancy architectures, including full dual-redundant lockstep, split/lock, master/checker, and... » read more

Blog Review: Nov. 28
By Jesse Allen - 28 Nov, 2018 - Comments: 0

Arm's Bo Eyole contends that the next generation of machine learning algorithms will have to deal with a vast amount of messy, unlabeled data and takes a look at some of the techniques, such as reinforcement learning and evolutionary computing, now being explored. Cadence's Paul McLellan considers how IP systems are increasingly limited by memory bandwidth rather than compute power and where... » read more

Power/Performance Bits: Nov. 27
By Jesse Allen - 27 Nov, 2018 - Comments: 0

Hybrid solar for hydrogen and electricity Researchers at the Lawrence Berkeley National Laboratory developed an artificial photosynthesis solar cell capable of both storing the sun's energy as hydrogen through water splitting and outputting electricity directly. The hybrid photoelectrochemical and voltaic (HPEV) cell gets around a limitation of other water splitting devices that shortchange... » read more

Blog Review: Nov. 21
By Jesse Allen - 21 Nov, 2018 - Comments: 0

Cadence's Paul McLellan looks at why specialized architectures will be the future of processor development, why general purpose processors are a poor match for AI, and other highlights from the recent Linley Processor Conference. Mentor's Harry Foster focuses on what's happening in FPGA design and the factors that are adding to increasing design and verification complexity. Synopsys' Lewi... » read more

Week In Review: Design, Low Power
By Jesse Allen - 21 Nov, 2018 - Comments: 0

Cadence taped out a complete GDDR6 memory IP solution consisting of PHY, controller and Verification IP on Samsung's 7LPP process. The GDDR6 IP allows up to 16Gb/sec bandwidth per pin, or over 500Gb/sec peak bandwidth between the SoC and each GDDR6 memory die. It is targeted at very high-bandwidth applications including AI, cryptocurrency mining, graphics, ADAS and HPC. ClioSoft debuted a So... » read more

Power/Performance Bits: Nov. 20
By Jesse Allen - 20 Nov, 2018 - Comments: 0

In-memory compute accelerator Engineers at Princeton University built a programmable chip that features an in-memory computing accelerator. Targeted at deep learning inferencing, the chip aims to reduce the bottleneck between memory and compute in traditional architectures. The team's key to performing compute in memory was using capacitors rather than transistors. The capacitors were paire... » read more

Week In Review: Design, Low Power
By Jesse Allen - 16 Nov, 2018 - Comments: 0

Tools & Standards Mentor uncorked a PCB design platform for non-specialist PCB engineers focused on multi-dimensional verification. The Xpedition platform can integrate a range of verification tools within a singular authoring environment, providing automatic model creation, concurrent simulation, cross probing from results, and error reviews to identify problems at the schematic or layout... » read more

Blog Review: Nov. 14
By Jesse Allen - 14 Nov, 2018 - Comments: 0

Mentor's Jin Hou and Joe Hupcey III explain two fundamental characteristics of formal analysis that simplify things for the formal algorithm and provide better wall clock run time and memory usage performance. Cadence's Paul McLellan shares highlights from five presentations all discussing what's behind AI's movement to edge devices, the vast amount of investment going into the area, and whe... » read more

Power/Performance Bits: Nov. 13
By Jesse Allen - 13 Nov, 2018 - Comments: 0

ML identifies LED material Researchers at the University of Houston created a machine learning algorithm that can predict a material's properties to help find better host material candidates for LED lighting. One recommendation was synthesized and tested. The technique, a support vector machine regression model, was efficient enough to run on a personal computer. It scanned a list of 118,28... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2025 SMG   |  Terms of Service  |  Privacy Policy