Blog Review: Nov. 14

Non-determinism and formal; AI at the edge; beating social engineering.


Mentor’s Jin Hou and Joe Hupcey III explain two fundamental characteristics of formal analysis that simplify things for the formal algorithm and provide better wall clock run time and memory usage performance.

Cadence’s Paul McLellan shares highlights from five presentations all discussing what’s behind AI’s movement to edge devices, the vast amount of investment going into the area, and where a few of the foreseeable challenges lie.

Synopsys’ Taylor Armerding points to the rising dangers of social engineering attacks with tips from expert Rachel Tobac on how to recognize and defuse potential security threats with the right amount of both politeness and paranoia.

Arm’s Marten van Hulst dives into how SRAM Physically Unclonable Functions can be used to create a robust, unchangeable Root of Trust and why that’s a vital part of device security.

SEMI’s Eugenia Liu and Shanshan Du examine the rise of China’s fabless segment and the boost it gets from proximity to the region’s electronic systems makers and investment programs, but warn of barriers to near-term growth.

Nvidia’s Isha Salian profiles a startup using autonomous drones with on-board AI to detect illegal fishing that threatens marine ecosystems off the west coast of Africa, a large area impossible to patrol via conventional means.

And don’t miss the featured blogs from last week’s Low Power-High Performance newsletter:

Editor In Chief Ed Sperling points to a massive amount of hardware and software engineering that will be required to handle an explosion in data.

Executive Editor Ann Steffora Mutschler finds progress in the ability of EDA tools and IP to address transistor aging.

Mentor’s John Ferguson examines the key innovations that made pure-play foundries and the fabless revolution possible.

Fraunhofer’s Andy Heinig contends there is no easy to solution for conflicting goals that make arranging copper pillars or microbumps around hard IP difficult.

Synopsys’ Rita Horner looks at the new 400 Gb/s Ethernet standard, which provides a range of interfaces for varying length and throughput requirements.

Cadence’s Ronak Shah digs into 5G and why power consumption remains a major barrier.

Rambus’ Mondeep Thiara points out the key to successfully taking a multi-die approach to designs.

ClioSoft’s Ranjit Adhikary looks to factors keeping companies from adopting new methods that could improve efficiency.

Mentor’s Harry Foster finds that DAC’s focus is expanding from just chips to include emerging challenges that span entire systems.

Rambus’ Nisha Amthul argues that securing the IoT will require a holistic approach.

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