Week In Review: Design, Low Power


VESA published the DisplayPort 2.0 standard, which allows for a max payload of 77.37 Gbps, a 3X increase in data bandwidth performance compared to DisplayPort 1.4a. The latest release also includes capabilities to address beyond 8K resolutions, higher refresh rates and HDR support at higher resolutions, multiple display configurations, and support for 4K-and-beyond VR resolutions. It is backwar... » read more

Artificial Intelligence: Let Us Get The Math Right First!


Artificial intelligence is a hot topic these days and therefore doesn’t require a repeat of the current and future potential uses for AI. For most people, it means technology advancements on the software side. But if you ask people who are very close to this technology domain, building your own optimized hardware chips is where a significant part of the competitive edge lies. A few days ba... » read more

Intellectual Property: Trust… But Verify


For those around the microelectronic component industry for many years, we have seen quite a transformation of capability, sourcing of the supply chain, and now threats to these devices that drive the technology in our world today. These integrated circuits (ICs), once so simple as a few transistors, have continued to follow Moore’s Law and are now made up of tens of billions of transistor... » read more

Week In Review: Design, Low Power


Tools & IP Cadence uncorked the latest version of JasperGold formal verification platform, providing improvements to the proof-solver algorithm and orchestration by using machine learning to select and parameterize solvers to enable faster first-time proofs and optimize successive runs for regression testing. Additionally, it increases design compilation capacity by over 2x with 50% reduct... » read more

Hardware Trojans And The Problem Of Trust In Integrated Circuits


Electronic systems are at the core of an ever-increasing number of products and services. From power plants to automobiles, from medical devices to airplanes, from smartphones to home appliances, complex electronic systems enable an unprecedented level of automation, performance, safety, and security. Integrated circuits (ICs) are the backbone of these systems. It is of paramount importance tha... » read more

The Weather Report: 2018 Study On IC/ASIC Verification Trends


Nobel Laureate Bob Dylan observed, “You don’t need a weatherman to know which way the wind blows.” Similarly, we can get a feeling for where our industry is going by attending to the flow of thought at conferences, on line, or in our daily business. But that gives us only a small window to observe the hurricane-like forces of the very large and complicated, extremely dynamic global semico... » read more

Fibonacci And Honey Bees Have Something In Common: A Sweet Spot For Formal


Time flies and the OneSpin’s Holiday Puzzle tradition has reached its third year. In December 2016, OneSpin challenged engineers everywhere to solve the Einstein riddle using assertions and a formal verification tool. In December 2017, the challenge was to model the hardest Sudoku in the world using assertions and find a solution with a formal tool. In addition, participants had to prove that... » read more

Don’t Have A Meltdown Over A Spectre In Your SoC


You may be concerned about last year’s widely published Spectre and Meltdown vulnerabilities affecting most processors. Are your phone and computer OK? Or more importantly, if you are designing or verifying a System on Chip (SoC), do you have a specter in your design? Let’s first look at what these two vulnerabilities are and how they may be affecting your system. Both vulnerabilitie... » read more

Formal Verification Of RISC-V Cores


RISC-V is hot and stands at the beginning of what may be a major shift in the industry. Even a cursory review of upcoming conferences programs and recent technical articles makes that clear. While it is still early in the evolution of the processor architecture, there is certainly the potential that RISC-V will be a game-changer in the IP and semiconductor industry. As “a free and open ISA en... » read more

The Problem With Post-Silicon Debug


Semiconductor engineers traditionally have focused on trying to create 'perfect' GDSII at tape-out, but factors such as hardware-software interactions, increasingly heterogeneous designs, and the introduction of AI are forcing companies to rethink that approach. In the past, chipmakers typically banked on longer product cycles and multiple iterations of silicon to identify problems. This no ... » read more

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