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Katherine Derbyshire

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Katherine Derbyshire is a technical editor at Semiconductor Engineering.

Author's Latest Posts

Progress On General-Purpose Quantum Computers
By Katherine Derbyshire - 21 Oct, 2021 - Comments: 0

The race is on to scale up quantum computing, transforming it from an esoteric research tool into a commercially viable, general-purpose machine. Special-purpose quantum computers have been available for several years now. Systems like D-Wave’s Advantage focus on specific classes of problems that are amenable to modeling as quantum systems. Still, the ultimate goal of having a general purp... » read more

Nudging 2D semiconductors forward
By Katherine Derbyshire - 16 Sep, 2021 - Comments: 1

The buzz about 2D materials replacing silicon appears to be premature. While 2D semiconductors have emerged as potential successors, it's not clear when or even if that will happen. As Iuliana Radu, Imec's director of quantum and exploratory computing observed, the “end” of silicon has been predicted many times before. It is not clear when 2D semiconductors will need to be ready. In fac... » read more

Stacked Nanosheets And Forksheet FETs
By Katherine Derbyshire - 19 Aug, 2021 - Comments: 0

What comes next after gate-all-around FETs is still being worked out, but it likely will involve some version of stacked nanosheets. The design of advanced transistors is a tradeoff. On one hand, it takes less gate capacitance to control a thin channel. On the other hand, thin channels can’t carry as much drive current. Stacked nanosheet designs seek to reconcile these two objectives by... » read more

Thinner Channels With 2D Semiconductors
By Katherine Derbyshire - 21 Jun, 2021 - Comments: 0

Moving to future nodes will require more than just smaller features. At 3/2nm and beyond, new materials are likely to be added, but which ones and exactly when will depend upon an explosion of material science research underway at universities and companies around the globe. With field-effect transistors, a voltage applied to the gate creates an electric field in the channel, bending the ban... » read more

Going Vertical With GaN Devices
By Katherine Derbyshire - 15 Apr, 2021 - Comments: 1

Gallium nitride has long been on the horizon for a variety of uses in semiconductors, but implementing this on a commercial scale has been relatively slow due to a variety of technical hurdles. That may be about to change. The wide bandgap of GaN makes it particularly attractive material for power conversion applications. Still, actually realizing its benefits in commercial devices has been ... » read more

IC Materials For Extreme Conditions
By Katherine Derbyshire - 18 Mar, 2021 - Comments: 1

The number of materials being researched for chips used in extreme environments, such as landing on the planet Venus, is growing. While GaN has captured much of the attention for power conversion circuits, it's just one of several applications for semiconductors in extreme environments. The high voltage, high temperature, and caustic atmospheres found in many industrial and aerospace environ... » read more

Power Converter Chip Research Booms
By Katherine Derbyshire - 18 Feb, 2021 - Comments: 0

Power electronics are booming, fueled by demand ranging from induction chargers for wearable and portable electronics, to charging stations for electric vehicles. An estimated 80% of all U.S. electricity will pass through some form of power converter by 2030, said Yogesh Ramadass, director of power management at Texas Instruments' Kilby Labs. Transportation applications, in particular, deman... » read more

Stronger, Better Bonding In Advanced Packaging
By Katherine Derbyshire - 21 Jan, 2021 - Comments: 1

System-in-package integrators are moving toward copper-to-copper direct bonding between die as the bond pitch goes down, making the solder used to connect devices in a heterogenous package less practical. In thermocompression bonding, protruding copper bumps bond to pads on the underlying substrate. In hybrid bonding, copper pads are inlaid in a dielectric, reducing the risk of oxidation. ... » read more

The Darker Side Of Hybrid Bonding
By Katherine Derbyshire - 17 Dec, 2020 - Comments: 2

With semiconductors, it's often things everyone takes for granted that cause the biggest headaches, and that problem is compounded when something fundamental changes — such as bonding two chips together using a process aimed at maximizing performance. Case in point: CMP for backend of the line metallization in hybrid bonding. While this is a mature process, it doesn't easily translate for ... » read more

Bonding Issues For Multi-Chip Packages
By Katherine Derbyshire - 19 Nov, 2020 - Comments: 1

The rising cost and complexity of developing chips at the most advanced nodes is forcing many chipmakers to begin breaking up that chip into multiple parts, not all of which require leading edge nodes. The challenge is how to put those disaggregated pieces back together. When a complex system is integrated monolithically — on a single piece of silicon — the final product is a compromise ... » read more

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