Author's Latest Posts


Electro-Thermal Design Breakthrough


Electronic component manufacturers have traditionally provided models in SPICE format, so customers can simulate their application circuits and better understand the features, capabilities, and interactions of those parts in the system context. Now, with BCI ROM, a similar and parallel thermal model supply chain can develop. This technology breakthrough arrives at a time of component design-in ... » read more

Speeding Time-To-Market With A Comprehensive And Tightly Integrated Design And Verification Process


Nobo Automotive Technology Co., Ltd. is a high-tech automotive electronics company under the Nobo Automotive group, focusing on intelligent cockpit, vehicle control, connectivity, and driving. Its range of products include cabin domain controllers, displays, instrument clusters, infotainment systems, central electronic units, T-Box terminals, and driving domain controllers, among others. Nobo A... » read more

The Four Foundational Pillars Of Calibre Shift Left Solutions For IC Design And Implementation Flows


As the semiconductor industry approaches a new era of digital transformation, design companies everywhere are turning to shift left strategies to address challenges that reduce design cycles while maximizing productivity, optimizing resource efficiency, ensuring design quality, and accelerating time to market. To overcome these challenges in IC design, Calibre shift left technologies include to... » read more

A Survey Of Machine Learning Applications In Functional Verification


Functional verification is computationally and data-intensive by nature, making it a natural target of machine learning applications. This paper provides a comprehensive and up-to-date analysis of FV problems addressable by ML. Among the various ML techniques and algorithms, several emerging ones have demonstrated outstanding potential in FV. Yet despite the promising research results, criti... » read more

Placement And CTS Techniques For High-Performance Computing Designs


This paper discusses the challenges of designing high-performance computing (HPC) integrated circuits (ICs) to achieve maximum performance. The design process for HPC ICs has become more complex with each new process technology, requiring new architectures and transistors. We highlight how the Siemens Aprisa digital implementation solution can solve placement and clock tree challenges in HPC de... » read more

Calibre DesignEnhancer Design-Stage Layout Modification Improves Power Management Faster And Earlier


The faster a design can progress from implementation to signoff verification, the better the chances are of meeting tapeout schedules. The Calibre DesignEnhancer platform offers P&R and custom/analog design teams a fast, integrated environment for implementing Calibre-clean design modifications to reduce IR drop and EM and prepare for physical verification. Not only can designers reduce EM and ... » read more

Shift Left With Calibre To Optimize IC Design Flow Productivity, Design Quality, And Time To Market


Every IC designer strives to create a “clean,” or error-free, cell, block, chiplet, SoC, or 3DIC assembly before passing their work downstream for full sign-off verification. However, waiting until sign-off verification to find out how well you did is probably the least efficient approach to achieving production-ready layouts, impacting engineer productivity, project schedules, and hardware... » read more

Power Modules: A Four-Dimensional Design Challenge Calls For A Holistic Design And Verification Approach


A power module is a high-power switching circuit used in applications for electric vehicles, renewable energy, photovoltaics, wind power, and much more. Switching-element IGBTs and MOSFETs are used in these modules. This paper discusses different technologies and the associated design challenges to achieve complex power module requirements like high voltage resistivity up to 1700 V, high curren... » read more

Distribution Of Currents In Via Arrays


It has become increasingly difficult in recent years to provide adequate PDNs on a PCB. The sheer number of different voltages, combined with increased current demands, makes distributing current around the board a substantial layout challenge. This paper demonstrates that by using appropriate and accurate simulations, combined with the improved intuition that such simulations bring, it is a ch... » read more

Placement And CTS Techniques For High-Performance Computing Designs


This paper discusses the challenges of designing high-performance computing (HPC) integrated circuits (ICs) to achieve maximum performance. The design process for HPC ICs has become more complex with each new process technology, requiring new architectures and transistors. We highlight how the Siemens Aprisa digital implementation solution can solve placement and clock tree challenges in HPC de... » read more

← Older posts Newer posts →