Author's Latest Posts

CISO’s Guide To Sensitive Data Protection
By Synopsys - 31 Mar, 2021 - Comments: 0

Emerging data protection and privacy laws are causing organizations to scramble to implement strategies that address regulatory compliance and data security governance. And the SolarWinds software supply chain attack, in which attackers inserted a malicious back door into its network software release that later led to sensitive data exposure, further underscores the need to secure the DevSecOps... » read more

Accelerate Custom Layout Using Custom Compiler’s User-Defined Device (UDD)
By Synopsys - 24 Mar, 2021 - Comments: 0

In this 7th video of the series, Kai Wang, Director of Engineering at Synopsys, discusses in-design electrical analysis, and why it is critical to use signoff engines to check and fix resistance, capacitance and electromigration issues during layout. Click here to access this video whitepaper. » read more

Designing ASIPs With Confidence
By Synopsys - 10 Mar, 2021 - Comments: 0

Well-designed ASIPs with a strong SDK combine C/C++ programmability with the power and performance of dedicated hardware. Product families based on ASIP platforms are often highly flexible, capable of addressing multiple market segments with the same silicon and handling updates in the field. They lean well towards software-driven verification with few penalties for late product requirement cha... » read more

Fast Cycle Approximate Simulation Using ARC nSIM NCAM
By Synopsys - 09 Mar, 2021 - Comments: 0

One of the key factors of successful software (e.g. firmware/application) development is the ability to quickly run and profile software in the absence of target hardware. The earlier in the design process that this is possible, the better, i.e. during the pre-silicon phase. Typically, the pre-silicon phase is dominated by three activities, each with different challenges: Exploring the Ha... » read more

Achieving Faster Closure With Reduced Setup And Debug Using Advanced RTL Static Signoff Platform
By Synopsys - 03 Mar, 2021 - Comments: 0

Many design houses are continually seeking ways to shorten their effective design cycle to address demanding market requirements, gain a formidable technological advantage, and secure leadership in their respective industries. This pressure can cause designers to get extremely overwhelmed by strict timelines. To meet tight project timelines, design teams often resort to identifying industry-lea... » read more

Distributed Development Of IP And SoC In Compliance With Automotive ISO 26262
By Synopsys - 24 Feb, 2021 - Comments: 0

Automotive functional safety System-on-Chips (SoCs) for Advanced Driver Assistance Systems (ADAS) contain several complex Intellectual Property (IP) cores. The IP cores are developed as a Safety Element out of Context (SEooC), meaning the context of the end application is not fully known at delivery time. In addition, IP development might be distributed across the globe. To reduce the risk of f... » read more

Accelerating SoC Verification Closure With Unified Verification Management Solution
By Synopsys - 08 Feb, 2021 - Comments: 0

Functional verification of system-on-chip (SoC) designs requires best-in-class tools linked together in a unified solution in order to address exponential complexity challenges. There is no one-size-fits-all method for verification. Complex designs require a combination of virtual prototyping, static checks, formal analysis, simulation, emulation and FPGA prototyping. The execution of all the t... » read more

10 Things You Ought To Know Before You Benchmark Your Software Security Program
By Synopsys - 03 Feb, 2021 - Comments: 0

Benchmarking can help you get a new software security initiative off the ground or better navigate an existing one. It is different from other measurement techniques because it focuses on excellence, includes detailed comparisons, and pools confidential information among numerous organizations. To get you started in the right direction, we’ve put together some quick tips so you get the mos... » read more

Machine Learning — Everywhere: Enabling Self-Optimizing Design Platforms for Better End-to-End Results
By Synopsys - 13 Jan, 2021 - Comments: 0

Machine-learning offers opportunities to enable self-optimizing design tools. Very much like self-driving cars that observe real-world interactions to improve their responses in different (local) driving conditions, AI-enhanced tools are able to learn and improve in (local) design environments after deployment. These new, ML-driven capabilities can be embedded in different design engines, gi... » read more

Verifying Safety-Critical FPGA Designs With Fault Simulation
By Synopsys - 12 Jan, 2021 - Comments: 0

Supporting safety and assurance in designs, such as the chips used in industrial, aerospace and defense applications, requires more than traditional functional verification. Even if every bug is found and fixed before release, these applications have additional requirements for functional safety. They must be able to handle a variety of faults and induced errors, either by correcting them or by... » read more

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