Author's Latest Posts

Accellera’s Functional Safety Group White Paper
By Technical Paper Link - 11 May, 2021 - Comments: 0

"The objective of the Functional Safety Working Group is to standardize information for capturing and propagating the safety intent from the system down to the SoC / IP design and implementation including failure mode propagation, verification, validation, reliability and Safety Mechanisms. The safety intent standardization will support data exchange and traceability across different safety ana... » read more

Ferroelectric, hafnium oxide based transistors for digital beyond von-Neumann computing
By Technical Paper Link - 21 Apr, 2021 - Comments: 0

Source: AIP Applied Physics Letters, published 2/4/2021.  Evelyn T. Breyer1,  Halid Mulaosmanovic1,  Thomas Mikolajick1,2, and  Stefan Slesazeck1 1Nanoelectronic Materials Laboratory (NaMLab) gGmbH, 01187 Dresden, Germany 2Chair of Nanoelectronics, TU Dresden, 01187 Dresden, Germany   Technical paper link is here » read more

Final Report: National Security Commission on AI
By Technical Paper Link - 10 Apr, 2021 - Comments: 0

  In August 2018, Section 1051 of the John S. McCain National Defense Authorization Act for Fiscal Year 2019 established the National Security Commission on Artificial Intelligence as an independent Commission “to consider the methods and means necessary to advance the development of artificial intelligence, machine learning, and associated technologies to comprehensively address the... » read more

A Novel PUF Using Stochastic Short-Term Memory Time of Oxide-Based RRAM for Embedded Applications
By Technical Paper Link - 31 Mar, 2021 - Comments: 0

Abstract: "RRAM suffers from poor retention with short-term memory time when using low compliance current for programing. However, the short-term memory time exhibits ideal randomness, which can be exploited as an entropy source for physically unclonable function (PUF). In this work, we demonstrated a novel PUF utilizing the stochastic short-term memory time of oxide-based RRAM. The proposed P... » read more

Hybrid Boolean Networks as Physically Unclonable Functions
By Technical Paper Link - 31 Mar, 2021 - Comments: 0

Abstract: "We introduce a Physically Unclonable Function (PUF) based on an ultra-fast chaotic network known as a Hybrid Boolean Network (HBN) implemented on a field programmable gate array. The network, consisting of N coupled asynchronous logic gates displaying dynamics on the sub-nanosecond time scale, acts as a `digital fingerprint' by amplifying small manufacturing variations during a peri... » read more

A Novel Complementary Architecture of One-time-programmable Memory and Its Applications as Physical Unclonable Function (PUF) and One-time Password
By Technical Paper Link - 31 Mar, 2021 - Comments: 0

Abstract "For the first time, we proposed a 2T complementary architecture of one-time-programmable memory (OTP) in a foundry logic CMOS chip. It was then used to realize the PUF (Physical unclonable function), and the combination with the AI technology to provide a one-time password capability. At first, an OTP was developed based on a novel 2T CMOS unit cell. The experimental results show t... » read more

Recent Advances in Thermal Metamaterials and Their Future Applications for Electronics Packaging
By Technical Paper Link - 31 Mar, 2021 - Comments: 0

Abstract: "Thermal metamaterials exhibit thermal properties that do not exist in nature but can be rationally designed to offer unique capabilities of controlling heat transfer. Recent advances have demonstrated successful manipulation of conductive heat transfer and led to novel heat guiding structures such as thermal cloaks, concentrators, etc. These advances imply new opportunities to gui... » read more

Enabling Efficient and Flexible FPGA Virtualization for Deep Learning in the Cloud
By Technical Paper Link - 06 Mar, 2021 - Comments: 0

SOURCE: Shulin Zeng, Guohao Dai, Hanbo Sun, Kai Zhong, Guangjun Ge, Kaiyuan Guo, Yu Wang, Huazhong Yang(Tsinghua University, Beijing, China).  Published on arXiv:2003.12101 [cs.DC])   ABSTRACT: "FPGAs have shown great potential in providing low-latency and energy-efficient solutions for deep neural network (DNN) inference applications. Currently, the majority of FPGA-based DNN accel... » read more

A Machine-Learning-Resistant 3D PUF with 8-layer Stacking Vertical RRAM and 0.014% Bit Error Rate Using In-Cell Stabilization Scheme for IoT Security Applications
By Technical Paper Link - 03 Mar, 2021 - Comments: 0

Abstract: "In this work, we propose and demonstrate a multi-layer 3-dimensional (3D) vertical RRAM (VRRAM) PUF with in-cell stabilization scheme to improve both cost efficiency and reliability. An 8-layer VRRAM array was manufactured with excellent uniformity and good endurance of >10 7 . Apart from the variation in RRAM resistance, enhanced randomness is obtained thanks to the parasitic IR... » read more

A Survey of Autonomous Vehicles: Enabling Communication Technologies and Challenges
By Technical Paper Link - 28 Feb, 2021 - Comments: 0

Abstract "The Department of Transport in the United Kingdom recorded 25,080 motor vehicle fatalities in 2019. This situation stresses the need for an intelligent transport system (ITS) that improves road safety and security by avoiding human errors with the use of autonomous vehicles (AVs). Therefore, this survey discusses the current development of two main components of an ITS: (1) gathering... » read more

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