Author's Latest Posts

Technologies For Power, Signal, Thermal, And EMI Sign-Off For Chip-Package-PCB Designs
By Various Writers - 10 Oct, 2013 - Comments: 0

Over the past few years, there has been a marked shift in the way people communicate and use computers. Some of the key changes include the prevalence of mobile internet connected devices such as smartphones and netbooks, the shift to cloud computing using larger centralized data centers, and the increase of electronics in automobiles for guidance, infotainment, and safety control systems. The ... » read more

Jasper Security Path Verification
By Various Writers - 10 Oct, 2013 - Comments: 0

Security path verification is the ability to verify the lack of existence of functional paths touching secure areas of a design. The Jasper security verification technology used in security path verification is based on path sensitization technology, which is used to find paths propagating data to and from secure areas. The Jasper technology can be used to verify requirements that are not exp... » read more

HDMI 2.0 Design And Verification Challenges
By Various Writers - 10 Oct, 2013 - Comments: 0

High-Definition Multimedia Interface (HDMI) is an audio/video (A/V) transmission protocol, which is omnipresent in consumer electronics, personal computing, and mobile products. Modern-day requirements of big screen resolutions, 3D, and multi-channel/multi-stream audio have pushed display devices to use a completely digital, high-speed transmission media, requiring a multi-layered protocol like... » read more

The Integrated IP Subsystem: A Converging SoC Solution
By Various Writers - 10 Oct, 2013 - Comments: 0

The consumer device market is witnessing incredible market space convergence between mobile handheld, automotive, and home electronics. IP vendors, engineers, and system design engineers face a multitude of challenges when designing and developing ICs, systems, or subsystems for the next great portable device. The next cell phone for instance, will not only be a multimedia player, but also a de... » read more

Advanced Verification IP Accelerates PCIe Integration Test
By Various Writers - 10 Oct, 2013 - Comments: 0

System-on-chip (SoC) complexity is being driven by platform convergence and the need for more processing power and lower power consumption. The complexity of SoC standards-based interfaces has similarly increased for the same reasons: low power, improved quality of service and high throughput. Design teams have adopted IP and reuse for designs of these complex protocols so they can focus their ... » read more

Productivity, Predictability And Use-Model Versatility
By Various Writers - 26 Sep, 2013 - Comments: 0

Hardware-assisted verification and prototyping has become a mandatory requirement to allow design teams to gain confidence that a chip tape out can be initiated. The choice of the right hardware-accelerated engine is driven by its productivity, predictability, and use-model versatility, all impacting the key concern of users how to remove bugs. The XP Platform allows design teams to get to the ... » read more

Established Nodes White Paper
By Various Writers - 26 Sep, 2013 - Comments: 0

A look at advanced place and route design for established process nodes. To download this white paper, click here. » read more

The Impact Of 14-nm Photomask Uncertainties on Computational Lithography Solutions
By Various Writers - 19 Sep, 2013 - Comments: 0

Computational lithography solutions rely upon accurate process models to faithfully represent the imaging system output for a defined set of process and design inputs. These models, in turn, rely upon the accurate representation of multiple parameters associated with the scanner and the photomask. While certain system input variables, such as scanner numerical aperture, can be empirically tuned... » read more

Analysis Of Random Resistive Faults And ATPG Effectiveness At RTL
By Various Writers - 12 Sep, 2013 - Comments: 0

The use of register transfer level (RTL) descriptions for design is now commonplace throughout the electronics industry. The wide range of flexibility in both Verilog and VHDL has provided incredible freedom so that the same function may be approached from many different directions. The resulting RTL may meet the functional requirements but fail to meet various other requirements such as optimi... » read more

Five Emerging DRAM Interfaces You Should Know For Your Next Design
By Various Writers - 12 Sep, 2013 - Comments: 0

Producing DRAM chips in commodity volumes and prices to meet the demands of the mobile market is no easy feat, and demands for increased bandwidth, low power consumption, and small footprint don’t help. This paper reviews and compares five next-generation DRAM technologies— LPDDR3, LPDDR4, Wide I/O 2, HBM, and HMC—that address these challenges. To view this white paper, click here. » read more

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