Securing confidential model in inference against off-chip side-channel attacks is critical in harnessing the performance advantage in practice.
Abstract—Accelerators used for machine learning (ML) inference provide great performance benefits over CPUs. Securing confidential model in inference against off-chip side-channel attacks is critical in harnessing the performance advantage in practice. Data and memory address encryption has been recently proposed to defend against off-chip attacks. In this paper, we demonstrate that bandwidth utilization on the interface between accelerators and the weight storage can serve a side-channel for leaking confidential ML model architecture. This side channel is independent of the type of interface, leaks even in the presence of data and memory address encryption and can be monitored through performance counters or through bus contention from an on-chip unprivileged process.
Click here to read more.
Less precision equals lower power, but standards are required to make this work.
Open source by itself doesn’t guarantee security. It still comes down to the fundamentals of design.
Ensuring that your product contains the best RISC-V processor core is not an easy decision, and current tools are not up to the task.
Wafer manufacturing and GPUs draw investment; 106 companies raise $2.8B.
Heterogenous integration depends on reliable TSVs, microbumps, vias, lines, and hybrid bonds — and time to digest all the options.
Less precision equals lower power, but standards are required to make this work.
New memory approaches and challenges in scaling CMOS point to radical changes — and potentially huge improvements — in semiconductor designs.
113 startups raise $3.5B; batteries, AI, and new architectures top the list.
127 startups raise $2.6B; data center connectivity, quantum computing, and batteries draw big funding.
Thermal mismatch in heterogeneous designs, different use cases, can impact everything from accelerated aging to warpage and system failures.
New applications require a deep understanding of the tradeoffs for different types of DRAM.
Electromigration and other aging factors become more complicated along the z axis.
Why and when it’s needed, and what tools and technologies are required.
Leave a Reply