tag: ML

Applying ML In Failure Analysis
By Anne Meixner - 20 Nov, 2023 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss how increasing complexity in semiconductor and packaging technology is driving shifts in failure analysis methods, with Frank Chen, director of applications and product management at Bruker Nano Surfaces & Metrology; Mike McIntyre, director of product management in the Enterprise Business Unit at Onto Innovation; Kamran H... » read more

DRAM Choices Are Suddenly Much More Complicated
By Ed Sperling - 13 Nov, 2023 - Comments: 0

Chipmakers are beginning to incorporate multiple types and flavors of DRAM in the same advanced package, setting the stage for increasingly distributed memory but significantly more complex designs. Despite years of predictions that DRAM would be replaced by other types of memory, it remains an essential component in nearly all computing. Rather than fading away, its footprint is increasing,... » read more

Applications Of Large Language Models For Industrial Chip Design (NVIDIA)
By Technical Paper Link - 10 Nov, 2023 - Comments: 0

A technical paper titled “ChipNeMo: Domain-Adapted LLMs for Chip Design” was published by researchers at NVIDIA. Abstract: "ChipNeMo aims to explore the applications of large language models (LLMs) for industrial chip design. Instead of directly deploying off-the-shelf commercial or open-source LLMs, we instead adopt the following domain adaptation techniques: custom tokenizers, domain-ad... » read more

Neural Network Model Quantization On Mobile
By Roberto Lopez Mendez - 09 Nov, 2023 - Comments: 0

The general definition of quantization states that it is the process of mapping continuous infinite values to a smaller set of discrete finite values. In this blog, we will talk about quantization in the context of neural network (NN) models, as the process of reducing the precision of the weights, biases, and activations. Moving from floating-point representations to low-precision fixed intege... » read more

What Will That Chip Cost?
By Brian Bailey - 30 Oct, 2023 - Comments: 0

In the past, analysts, consultants, and many other experts attempted to estimate the cost of a new chip implemented in the latest process technology. They concluded that by the 3nm node, only a few companies would be able to afford them — and by the time they got into the angstrom range, probably nobody would. Much has changed over the past few process nodes. Increasing numbers of startups... » read more

Optimization Of The Interface Between The PD And The AFE In High-Speed, High-Density Optical Receivers
By Technical Paper Link - 27 Oct, 2023 - Comments: 0

A technical paper titled “Optimizing the Photodetector/Analog Front-End Interface in Optical Communication Receivers” was published by researchers at University of Toronto. Abstract: "This article addresses the optimization of the interface between the photodetector (PD) and the analog front-end in high-speed, high-density optical communication receivers. Specifically, the article focuses... » read more

Energy Usage in Layers Of Computing (SLAC)
By Technical Paper Link - 19 Oct, 2023 - Comments: 0

A technical paper titled “Energy Estimates Across Layers of Computing: From Devices to Large-Scale Applications in Machine Learning for Natural Language Processing, Scientific Computing, and Cryptocurrency Mining” was published by researchers at SLAC National Laboratory and Stanford University. Abstract: "Estimates of energy usage in layers of computing from devices to algorithms have bee... » read more

Big Changes Ahead For Photomask Technology
By Gregory Haley - 19 Oct, 2023 - Comments: 0

The move to curvilinear shapes on photomasks is gaining steam after years of promise as a way of improving yield, lowering defectivity, and reducing wasted space on a die — all of which are essential for both continued scaling and improved reliability in semiconductors. Interest in this approach ran high at this year's SPIE Photomask Technology + EUV Lithography Conference. Put simply, cur... » read more

Applying Machine Learning to EDA, FPGA Design Automation Tools
By Technical Paper Link - 11 Oct, 2023 - Comments: 0

A technical paper titled “Application of Machine Learning in FPGA EDA Tool Development” was published by researchers at the University of Texas Dallas. Abstract: "With the recent advances in hardware technologies like advanced CPUs and GPUs and the large availability of open-source libraries, machine learning has penetrated various domains, including Electronics Design Automation (EDA). E... » read more

Neuromorphic Hardware Accelerator For Heterogeneous Many-Accelerator SoCs
By Technical Paper Link - 28 Sep, 2023 - Comments: 0

A technical paper titled “SpikeHard: Efficiency-Driven Neuromorphic Hardware for Heterogeneous Systems-on-Chip” was published by researchers at Columbia University. Abstract: "Neuromorphic computing is an emerging field with the potential to offer performance and energy-efficiency gains over traditional machine learning approaches. Most neuromorphic hardware, however, has been designed wi... » read more

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