Blog Review: April 10

LPDDR’s new markets; superconductor IC parasitic extraction; shift left on HPC efficiency; STEM education.


Cadence’s Shyam Sharma looks at the evolution of the LPDDR standard and finds that LPDDR5X is opening new specialized markets for low-power DRAMs beyond the traditional areas of mobile, IoT, and automotive.

Siemens’ Hossam Sarhan and Dusan Petranovic find that new physical verification approaches are needed to ensure the performance and reliability of superconducting ICs and introduce a hybrid methodology to extract both magnetic and kinetic parasitic inductances for superconductor designs.

Synopsys’ William Ruby argues that it’s critical to adopt a shift-left mentality and address the energy efficiency of high-performance computing and data center SoCs from the beginning when defining the architecture.

Arm’s Christopher Rumpf suggests that ISA parity in the cloud and at the edge can improve the automotive software development process by enabling software to be built and tested in the cloud, with exactly the same binaries as a recompile deployable in the vehicle.

Ansys’ Susan Coleman checks out how simulation is used not only to design and optimize integrated photonics devices but also to support workforce development as part of a program introducing K-12 and college students to photonics concepts and applications.

Keysight’s Marie Hattar points to the benefits of early STEM education to help foster children’s curiosity, improve teamwork, and develop problem-solving skills.

In a podcast, SEMI’s Bettina Weiss, Genpact’s George Thompson, and Resilinc’s Chris Benham chat about the changes affecting semiconductor supply chains and how companies can strategically prioritize both supply chain resiliency investment while increasing business revenue.

Plus, check out the blogs featured in the latest Automotive, Security & Pervasive Computing and Test, Measurement & Analytics newsletters:

Onto Innovation’s Bryce Chi explains how using a combination of ML algorithms can improve accuracy and streamline the inspection process.

Synopsys’ Rohan Bhatnagar explores the transition to gate-all-around transistors.

NI’s Alejandro Escobar Calderon outlines the challenges in assessing the performance of high-speed wireless devices under real-world conditions.

Synopsys’ Ron DiGiuseppe digs into ways to lower costs and minimize complexity with a new generation of centralized EE architectures.

Siemen EDA’s Jacob Wiltgen explains why traditional approaches of redundancy within the chip are quickly becoming cost prohibitive.

Cycuity’s Andreas Kuehlmann warns that regulatory pressure and the emergence of complex cyberattacks make implementing a comprehensive security design lifecycle critical.

Flex Logix’s Jayson Bethurem shows how to expand market applicability and increase security for modern SoCs with high compute acceleration engines.

Rambus’ Adiel Bahrouch details why an integrated approach to the hardware security module IP and software stack is essential.

Cadence’s Veena Parthan demystifies modeling turbulence, explaining its wide range of spatial and temporal scales.

TXOne Networks’ Jim Montgomery points to the persistent gap between awareness and action regarding investment in OT/ICS cyber defenses.

Renesas’ Giancarlo Parodi looks at a general-purpose microcontroller with a mix of analog and digital peripherals.

Infineon’s Vasiliki Makantasi examines how an adjustable overcurrent threshold enables optimized system protection.

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