Multi-die architecture planning; debugging UVM; AI development; EMI metamodeling.
Synopsys’ Johannes Stahl and Tim Kogel suggest that multi-die systems require a new approach at the architecture planning phase and why chip designers can’t ignore physical effects such as layout, power, temperature, or IR-drop.
Siemens’ Rich Edelman argues for using the waveform window in a GUI rather than $display when debugging UVM.
Cadence’s Paul Scannell stresses the need for diverse teams working on generative AI technologies, including in EDA, to ensure they are beneficial to society.
Renesas’ Graeme Clark points to typical noise sources that can cause issues for microcontrollers and the importance of ensuring an oscillator will have stable performance in a particular system.
Ansys’ Giancarlo Guida, Martin Husek, and Prasanna Padmanabhan introduce metamodeling as a technique for diagnosing potential electromagnetic interference and compatibility issues in the design, optimization, and assessment of cable harnesses in automotive as well as aerospace and defense.
Keysight’s Mark Sand breaks down the 5Cs of IoT and how testing for connectivity, continuity, compliance, coexistence, and cybersecurity all play a role in delivering benefits such as shared data, multiple applications for one device, and overall greater ease of use.
Arm’s Eric Liu checks out the Java Vector API, which enables developers to use vector operations in a platform agnostic way.
Infineon’s Sneha Prahalad takes a look at how a Trusted Platform Module (TPM) uses sealing to secure user credentials and keys if the system configuration changes or the software is compromised.
SEMI’s Michelle Williams-Vaden suggests apprenticeships as a way to help develop the estimated 1 million new workers the semiconductor industry will need, including fab operators, engineers, and technicians.
And don’t miss the blogs featured in the latest Low Power-High Performance newsletter:
Fraunhofer IIS/EAS’ Ron Martin and Christoph Sohrmann advise coupling computing hardware models with sensor models for better simulation of automated driving functions.
Rambus’ Lou Ternullo digs into PAM4 signaling, which offers much higher data rates as well as new challenges for PCB and package design.
Synopsys’ William Ruby explains how end-to-end power analysis helps achieve optimal performance-per-watt.
Quadric’s Steve Roddy looks at graph compilers, which are just getting started.
Ansys’ Akanksha Soni gives a fresh introduction to the chip industry and where it’s headed with 2.5D and 3D-IC.
Siemens’ Jimmy Tien explains why an automated via kit migration is needed to support new technology nodes and rule decks.
Arm’s Jamie Cunliffe offers key tips for porting Neon code to Rust and differences from C.
Cadence’s Veena Parthan shows how to avoid cavities, overlapping surfaces, extrusions, and saddle corners that impede quality meshing of marine geometries.
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