Blog Review: Aug. 28

Synopsys’ Jon Ames checks out how the Ultra Ethernet Consortium aims to revolutionize networking by optimizing Ethernet for the rapidly evolving AI and HPC workloads by addressing critical issues like tail latency that are encountered by machine learning algorithms in large compute clusters.

Cadence’s Kos Gitchev introduces the DDR5 Multiplexed Rank DIMM (MRDIMM), a memory module technology for HPC and AI in cloud applications that leverages existing DDR5 DRAM memory devices to not only double the DRAM data rate but also maintain the RAS capabilities of the industry-proven RDIMM modules.

Siemens’ Stephen Ferguson points to how advanced simulations and digital twins are being used to diagnose and solve the thruster and helium leak issues that prevented the Starliner from returning from the ISS with its astronauts and considers the parallels between Apollo 13 and modern space missions.

Keysight’s Roberto Piacentini Filho takes a look at why traceability is an important part of IP management and can enhance design performance and quality while eliminating potential risks introduced by technical, organizational, and supply chain complexities.

Arm’s Khalid Saadi describes how to implement the same matrix-matrix multiplication algorithm using Arm Neon, SVE, and SME with an explanation of the key differences between the three technologies for developers who want to port code from Neon or SVE/SVE2 to SME/SME2.

Ansys’ Laura Carter points to the role digital twins and physics-based reduced-order models play in accelerating electric vehicle development through the ability to use virtual plant models and actual controller algorithms to perform early-stage requirement verification in a simulation environment.

The ESD Alliance’s Bob Smith chats with John Kibarian of PDF Solutions about semiconductor industry trends, AI for manufacturing data analytics, and the impact of digital twins in manufacturing.

For a change of pace, check out a recent video:

Why Connectivity Is Changing Microcontrollers as the age of simple MCUs has given way to much more complex low-cost devices.

New approaches to moving more data faster and more efficiently are found in Next-Gen High-Speed Communication In Data Centers.

Real-World Applications Of Computational Fluid Dynamics and how faster processing is revolutionizing different industries.

Challenges and future directions for disaggregating SoCs and Making Electronics More Efficient.

Changes in software can be instantaneous, but the underlying platform needs to be robust, secure, and safe as the automotive industry moves Toward Software-Defined Vehicles.

Errors in chiplets, automotive safety, processors become key targets for Changes In Formal Verification.

Promises And Pitfalls Of SoC Restructuring include the need to sidestep data incompatibility issues in heterogeneous chip designs.

Making Adaptive Test Work Better by managing more data efficiently.

Microcontrollers become key platform for machine learning with recent MCU Changes At The Edge.

Understanding Electromigration And IR Drop At Advanced Nodes helps achieve a DRC-clean, manufacturing-ready design.

Right-sizing chiplets and other components based on real workloads is part of Adapting To Evolving IC Requirements.

Sensor Fusion Challenges In Automotive and why a single, centralized architecture is so critical for sensors.