Blog Review: Feb. 10

Cadence’s Paul McLellan finds out some of the pressing technological challenges and opportunities at the recent SEMI Industry Strategy Symposium, from the purity of gases and other materials used in semiconductor manufacturing to increasing cost and time-to-market pressures.

Siemens EDA’s Harry Foster examines trends in low power ASIC and IC design, including active management of power and the different aspects of power management that design projects must verify.

Synopsys’ Jonathan Knudsen points to the importance of baking security into every phase of software development with the help of automation tools.

A Rambus writer explains how programmable hardware roots of trust can be used to protect connected devices from current and future threats by providing a foundation for secure operations.

Ansys’ Jamie Gooch checks out how incorporating reliability physics and physics of failure analysis early in the product design and development cycle helps automakers and their suppliers bring new technologies to market faster.

SEMI’s Serena Brischetto chats with Eyal Shekel of TEL about the impact of AI on smart manufacturing and how other fab solutions for smarter process tools are advancing semiconductor manufacturing.

Arm’s Ben Clark presents an example of porting a Windows app, the music notation app StaffPad, to run natively on Arm using Universal Windows Platform.

Plus, check out the blogs highlighted in the latest Automotive, Security, & Pervasive Computing and Test, Measurement & Analytics newsletters:

Editor in Chief Ed Sperling observes that optimization removes some of the baseline measurements for chips in intelligent systems.

Onto Innovations’ Xuandong Cao summarizes the different ways automatic defect classification can benefit a manufacturing operation.

Synopsys’ Stephen Crosher describes how to assess product performance, utilization, and longevity with in-chip monitoring.

Advantest’s Dieter Ohnesorge digs into how the latest Wi-Fi standard, which adds more channels and bandwidth, is creating new testing challenges.

FormFactor’s Dan Rishavy explains testing a key technology for 3D sensing capabilities in smartphones and automotive.

Siemens EDA’s Kurt Takara and NXP’s Ankush Sethi and Aniruddha Gupta demonstrate what to do when conventional CDC methodologies can’t identify critical bugs in complex reset architectures.

Cadence’s Paul McLellan takes a look at the prospects for global recovery, the application areas where growth is expected, and how segments have recently performed.

Synopsys’ Solaiman Rahim advises performing glitch power analysis and optimization early in the design cycle for to lower power consumption of AI accelerators.

OneSpin’s John Hallman explains how to reduce the risk of exploits by using automated checks to identify known issues early.

Xilinx’s Delight Nwangwu predicts domain-specific architectures for AI and growing SmartNIC deployment are just two of the trends that will have an impact this year.