Blog Review: Feb. 3

Industry growth prospects; verification language adoption; safe cloud data; China’s IC capacity.


Cadence’s Paul McLellan listens in on the outlook from SEMI’s recent Industry Strategy Symposium, which looked at the prospects for global recovery, the application areas where growth is expected, and how segments have recently performed.

Siemens EDA’s Harry Foster takes a look at trends in the adoption of languages and libraries for IC and ASIC designs and finds continued interest in SystemVerilog for RTL creation and increasing use of C/C++, PSS, and Python for testbench development.

Synopsys’ Dana Neustadter examines ways to keep sensitive data in the cloud safe by safeguarding the high-speed interfaces on which the data travels.

SEMI’s Christian G. Dieseldorff tracks China’s accelerating IC wafer capacity growth from fifth among seven regions in 2012 to number three in 2019, with the country’s capacity expected to creep closer to Taiwan and Korea in 2021.

In a video, VLSI Research’s Andrea Lati, Dan Hutcheson, John West, and Risto Puhakka discuss fab equipment growth, a shortage of materials and auto chips, and the overall outlook for semiconductors in 2021.

Arm’s Pareena Verma shares how to use free Fixed Virtual Platforms to jumpstart machine learning software development for the Ethos-U55 processor.

Ansys’ Susan Coleman profiles Axiom Space, a startup that is launching a commercial space station that will attach to the ISS using a unique oxygen-methane-powered spacecraft.

Nvidia’s Isha Salian checks out how AI and accelerated computing are helping analyze an increasing amount of biomedical data for faster drug discovery as well as create software-defined medical instruments.

Plus, check out the blogs highlighted in the latest Systems & Design newsletter:

Technology Editor Brian Bailey observes that just because an invention is no longer practical for many applications does not mean it wasn’t a good invention at the time.

Siemens’ Geir Eide explains why a bus-based scan data distribution architecture enables true bottom-up DFT flows.

Synopsys’ Kiran Vittal looks at why equivalence checking provides a powerful method for verifying the most complex AI datapaths, even across very different levels of abstraction.

Vtool’s Hagai Arbel digs into what needs to change in verification to improve the rate of first silicon success.

Cadence’s Frank Schirrmeister finds that although a lot has changed technologically in the last 20 years, underlying themes hold steady.

Codasip’s Roddy Urquhart warns that regardless of whether an ISA is commercially licensed or open, continued stability and availability are big concerns for licensees.

OneSpin’s Rob van Blommestein explains how to detect critical bugs in an open-source core for high-volume chips with formal verification.

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