Blog Review: June 1

Portable Stimulus; 3D Xpoint; scaled flow control credits; cache coherency; printing pills; edge nodes; ePassports.

popularity

You have probably heard a lot about Portable Stimulus recently. Mentor’s Tom Fitzpatrick talks about one proposal that the standards group is considering and the overlap between it and the second proposal.

Cadence’s Paul McLellan takes a look at 3D Xpoint and where it fits in the memory hierarchy.

Synopsys’ Anand Shirahatti, Mohd Adil Khan, and Jamshed Alum introduce scaled flow control credits in the PCIe Gen 4 specification and the verification challenges that come along with it.

ARM’s Neil Parris digs into cache coherency and shared virtual memory and how they help pave the way for heterogeneous compute.

Your next prescription may come in the form of a 3D printed pill with a customized dosage and release rate, in this week’s top five tech picks from Ansys’ Justin Nescott. Plus, a bus that rises above it all and helping robots avoid unnecessary damage with pain.

Optimizing how edge nodes handle data will be vital for success of the IoT, says Rambus’ Aharon Etengoff.

NXP’s Peter Schmallegger looks at the challenge of fraudulent passports, and how the answer doesn’t rest on ePassports alone.

A Lam Research staff writer presents ten fun facts about silicon.

Synopsys’ Robert Vamosi takes a look at the latest threat to maritime shipping: outdated software and vulnerability to cyber attacks.

Are you doing extraction in the most efficient manner? Mentor’s Yousry Elmaghraby walks through the steps necessary to ensure you are using the best approach.

Cadence’s Christine Young discusses challenges and design considerations of building biomedical circuitry for unobtrusive, wearable health monitoring.

And if you missed last week’s System Level Design newsletter, check out these featured blogs:

Editor In Chief Ed Sperling contends that IC M&A activity hangs in the balance between the yuan devaluation and U.S. interest rate hikes.

Synopsys’ Tom De Schutter examines how to maximize utilization of FPGA-based prototyping by letting it be far away.

Agnisys’ Anupam Bakshi argues that whether dealing with SoCs or a disaster in space, determining the correct set of steps is vital.

OneSpin Systems’ Dave Kelf digs into how to make standards creation a less biased process.

Aldec’s Louie De Luna observes that to successfully implement DO-254, organizations must be prepared to make a big change.

Cadence’s Frank Schirrmeister points to verification engines, portable stimulus and ecosystems.

Mentor’s Yousaf Mohammad uses computational fluid dynamics to design and select the ideal heatsink.



Leave a Reply


(Note: This name will be displayed publicly)