Blog Review: March 29

Multi-die challenges; metal line resistance and deposition, etch techniques; code analysis and AI; co-packaged optics.


Siemens’ Heather George suggests adopting a shift-left strategy for complex designs that integrate multiple dies into a package and examines the challenges and opportunities for performing comprehensive tests on 2.5D and 3D IC designs.

Synopsys’ Shekhar Kapoor notes that when considering whether a system will perform as intended, techniques that work well for monolithic SoCs may not be as well suited for multi-die system architectures.

Cadence’s Anne-Marie Schelkens explains how computational fluid dynamics can help significantly improve the efficiency of drones and extend their flight time and range.

Coventor’s Timothy Yang investigates whether a physical vapor deposition and ion beam etch technique can lower resistance of semiconductor metal lines compared to a conventional trench etch followed by damascene deposition.

Riscure’s Jasper van Woudenberg explores how ChatGPT can be used in source code analysis by feeding it a C file with many known vulnerabilities, and finds that while it is not currently accurate enough to fully rely on for code review, it could be used as a tool as long as the security analyst understands its limitations.

Keysight’s Rick Clark notes that while co-packaged optics presents a revolution in a long unchanged approach to data center switch design, it carries with it an accompanying set of challenges: balancing power and cost savings, standardizing for interoperability, ensuring reliability and repairability, and implementing new methods for test and validation.

SEMI’s Jaegwan Shim shares highlights from the keynotes at SEMICON Korea, including the explosion of connected devices, 3D integration as a driver of higher performance, and semiconductor market outlooks.

Ansys’ Gwenael Moysan looks at optimizing automotive interior lighting through simulation of aspects such as light leakage, display legibility, and sun reflections.

Arm’s Andy Rose shares an overview of the company’s architecture security efforts, including defensive execution technologies, isolation technologies, platform security services, and standard security APIs, as well as the importance of ecosystem collaboration.

Lithography expert Chris Mack shares some updates on updates on EUV pellicles, plus metrology and other highlights from the recent SPIE Advanced Lithography and Patterning Symposium.

And don’t miss the blogs featured in the latest Systems & Design newsletter:

Technology Editor Brian Bailey contends that existing EDA companies may be missing significant changes because they are not looking for true disruptions.

Expedera’s Paul Karazuba digs into how the underlying test conditions come into play when looking at NPU benchmark data.

NI’s Kaitlynn Mazzarella and Marvin Landrum observe that efficiency increases when test measurement software is standardized across an organization.

Synopsys’ Taruna Reddy and Robert Ruiz predict that when AI-driven EDA flows can take on repetitive tasks, engineers gain the bandwidth to work on bug fixes and push their designs further.

Siemens’ Nebabie Kebebew explains why determining the type of cloud environment and which design and verification workflows to move is key to a successful migration.

Renesas’ Graeme Clark looks at standardizing the communication between sensors and the host CPU with the I3C interface.

Keysight’s Jenn Mullen finds that big ideas and practical realities are often at odds when developing new product features.

Cadence’s Paul Scannell sees the relationship between EDA suppliers and consumers changing.

Codasip’s Lauranne Choquin points to growing momentum for customized RISC-V hardware.

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