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Blog Review: Sept. 29

Big chips; EV design challenges; CDC and RDC bugs; China’s IC gains.

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Cadence’s Paul McLellan checks out two of the biggest chips presented at the recent Hot Chips: a graphics chip from Intel for an upcoming supercomputer and Cerebras’ wafer-scale AI chip.

Synopsys’ Datsen Davies Tharakan lists the top five design challenges for electric vehicles and power semiconductors and why a robust design flow can accelerate the growth of hybrid and electric vehicles going forward.

Siemens EDA’s Chris Giles highlights the importance of checking that designs are free of common CDC and RDC bugs that slow down or entirely restart development processes, even before verification begins.

SEMI’s Kim Sin expects China’s IC industry revenue to skyrocket, doubling from $128 billion in 2020 to $257 billion by 2025 with steady investments in new chip companies, fab capacity, and capital equipment.

Ansys’ Tim Palucka checks out a startup aiming to make low Earth orbit space missions more readily accessible through an autonomous transport service for satellites that can be ready to take off in hours rather than months.

Arm’s Martin Bradley looks at the explosive growth in smartwatches as more powerful SoCs and edge machine learning techniques enable greater abilities to collect and analyze user health data.

Memory analyst Jim Handy considers the confusion over storage class memory and the wide range of definitions in a chat with the person who coined the term.

Plus, catch up on the blogs featured in the latest Systems & Design newsletter:

Technology Editor Brian Bailey looks at what can we expect to see come down the wearables runway, and what it really represents.

Siemens EDA’s Dina Medhat explains how to determine appropriate electrostatic discharge robustness requirements.

Cadence’s Frank Schirrmeister asks if there is an industry domain leading the adoption of AI.

Synopsys’ Yudhan Rajoo explores why the artful balancing act of designing SoCs can no longer be accomplished with traditional RTL-to-GDSII flows.

Codasip’s Rupert Baines sees industry momentum and interest in RISC-V continue to grow.

Synopsys’ Kenneth Larsen asserts that like cities, chips need to go vertical to expand.

Arteris IP’s Kurt Shuler advises when evaluating a new technology, don’t aim for a simple 1-to-1 replacement.



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