Blog Review: Sept. 30

Open source vulnerabilities; multicore programming; pre-ISO 26262 IP; computational storage.


Synopsys’ Fred Bals takes a look open source projects that, while popular, go understaffed or underfunded, how that can lead to potential security vulnerabilities, and why users who rely on them should consider stepping up to contribute.

In a video, Mentor’s Colin Walls explains the basic concepts of multicore systems as it relates to embedded programming.

Cadence’s Paul McLellan ponders what to do about the use of legacy IP, developed before the ISO 26262 functional safety standard, in automotive and safety-related applications.

Arm’s Neil Werdmuller argues that computational storage, where data can be processed directly where it is stored, is a necessary enabler for native AI and ML in distributed IoT and edge devices.

Ansys’ Julien Muller and Maxime Cailler check out vertical farming and how LED and lighting simulation plays a role in optimizing indoor farms for shorter growing times.

A Rambus writer considers how cryptography has evolved from the 19th century days of Kerckhoff’s Principle to deal with modern, and sometimes inexpensive, attacks that can reveal a system’s security architecture.

SEMI’s Maria Vetrano chats with David Horsley of TDK’s Chirp Microsystems about how time-of-flight sensors could be used to gauge and implement physical distancing measures in workplaces such as factories and distribution sensors, without tracking personal information.

A Lam Research writer looks at how smart cities can improve infrastructure and quality of life through wide deployment of sensors and machine learning-powered analytics to crunch the data received.

Intel’s Sameer Sharma explains the role 5G can play in smart cities, from improved traffic flows to reduced energy consumption.

Plus, check out the blogs featured in the latest Systems & Design newsletter:

Editor in chief Ed Sperling asks, if the economic conditions for consolidation are all there, what’s the holdup?

Technology Editor Brian Bailey examines what benchmarking at the embedded level would look like.

Cadence’s Frank Schirrmeister sees networks adapting to meet the upcoming explosion of latency-sensitive data.

Mentor’s Raghav Katoch points to the importance of avoiding time-consuming and error-filled LVS on early, incomplete designs.

Synopsys’ Joe Mallett warns that single-clock design is not always as easy as it seems.

Codasip’s Roddy Urquhart digs into how processors can be complex in many different ways, depending on the needs of a project.

Valtrix’s Shubhodeep Roy Choudhury argues for using software-driven stimulus to meet the verification demands of complex SoC designs and tight time-to-market constraints.

OneSpin’s Rob van Blommestein reports that IC integrity verification is a major focus at recent and upcoming industry virtual conferences.

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