TSMC’s Plan For Closing The Communication Gap
By Barry Pangrle - 03 Oct, 2024 - Comments: 0

TSMC held its North American Open Innovation Platform (OIP) Ecosystem Forum at the Santa Clara County Convention Center on Sept. 25, providing a quick roadmap update and to recognize its partners for all the collaborative work needed to keep the TSMC innovation train rolling and enabling its customers to utilize the latest technologies. L.C. Lu, TSMC fellow and vice president of R&D, sai... » read more

Working With Chiplets
By Ed Sperling - 02 Oct, 2024 - Comments: 0

The usual method of migrating to the next process node to cram more features onto a piece of silicon no longer works. It's too expensive, and too limited for most applications. The path forward is now heterogeneous chiplets targeted at specific markets, and while logic will continue to scale, other features are being separated out into chiplets developed using different process technologies. Th... » read more

Preparing For Ferroelectric Devices
By Katherine Derbyshire - 02 Oct, 2024 - Comments: 0

The discovery of ferroelectricity in materials that are compatible with integrated circuit manufacturing has sparked a wave of interest in ferroelectric devices. Ferroelectrics are materials with a permanent polarization, the direction of which can be switched by an applied field. This polarization can be used to raise or lower the threshold voltage of a transistor, as in FeFETs, or it can c... » read more

Research Bits: Oct. 1
By Liz Allan - 01 Oct, 2024 - Comments: 0

Rust-resistant coating for 2D semiconductors Researchers from Pennsylvania State University, National Yang Ming Chiao Tung University in Taiwan, Purdue University, Intel, and the Kurt J. Lesker Company developed a synthesis process to produce a rust-resistant coating with properties ideal for creating faster, more durable electronics. "One of the biggest issues that we see in 2D semiconduct... » read more

Chip Industry Technical Paper Roundup: Oct. 1
By Linda Christensen - 01 Oct, 2024 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=360 /] More ReadingTechnical Paper Library home » read more

Data Routing In Heterogeneous Chip Designs
By Ed Sperling - 30 Sep, 2024 - Comments: 0

Ensuring data gets to where it's supposed to go at exactly the right time is a growing challenge for design engineers and architects developing heterogeneous systems. There is more data moving around these chips with dozens of targets, which makes routing signals much more complicated. Ronen Perets, senior product marketing manager at Cadence Design Systems, talks about some of the new problems... » read more

Corner-Case Bug Hunting for RISC-V
By Ashish Darbari - 30 Sep, 2024 - Comments: 0

By Ashish Darbari and Ia Tsomaia RISC-V continues to make headlines worldwide, but verification continues to be challenging. The findings of the Wilson Research Report, 2022 (see figure 1) make the trends in verification clear. We presented these in a keynote talk titled, "Future is Formal," at the recent DVCon India event. One thing is quite apparent: whether you are using directed tests... » read more

Barriers To Chiplet Sockets
By Brian Bailey - 30 Sep, 2024 - Comments: 0

Experts At The Table: Demand for chiplets is growing, but debate continues about whether standards and general-purpose chiplets will kick-start the commercialization boom, or whether success will come through customization of those chiplets. Semiconductor Engineeering sat down to discuss these and other related issues with Elad Alon, CEO of Blue Cheetah; Mark Kuemerle, vice president of technol... » read more

Fine-Grained Functional Partitioning For Low Level SRAM Cache in 3D-IC designs (imec)
By Technical Paper Link - 27 Sep, 2024 - Comments: 0

A new technical paper titled "Towards Fine-grained Partitioning of Low-level SRAM Caches for Emerging 3D-IC Designs" was published by researchers at imec. "We propose a partitioning of low-level (faster access) caches in 3D using an Array Under CMOS (AuC) technology paradigm. Our study focuses on partitioning and optimization of SRAM bit-cells and peripheral circuits, enabling heterogeneous ... » read more

Memristors: Flexible Behavioral Model ( Israel Institute of Technology)
By Technical Paper Link - 27 Sep, 2024 - Comments: 0

A new technical paper titled "VVTEAM: A Compact Behavioral Model for Volatile Memristors" was published by researchers at Technion – Israel Institute of Technology. Abstract "Volatile memristors have recently gained popularity as promising devices for neuromorphic circuits, capable of mimicking the leaky function of neurons and offering advantages over capacitor-based circuits in terms of... » read more

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