How AiP/AoP Technology Helps Enable 5G And More


For 5G smartphones and other millimeter wave (mmWave) applications, antenna integration off the board and into the package, simplifies the design challenges endemic to high-frequency devices. These challenges include signal loss, signal integrity, and power supply limitation. Antenna in Package (AiP) and Antenna on Package (AoP) constructions provide the required form, fit and function for high... » read more

Devices And Transistors For The Next 75 Years


The 75th anniversary of the invention of the transistor sparked a lively panel discussion at IEDM, spurring debate about the future of CMOS, the role of III-V and 2D materials in future transistors, and what will be the next great memory architecture.[1] Industry veterans from the memory, logic, and research communities see high-NA EUV production, NAND flash with 1,000 layers, and hybrid bon... » read more

2D Semiconductor Materials Creep Toward Manufacturing


As transistors scale down, they need thinner channels to achieve adequate channel control. In silicon, though, surface roughness scattering degrades mobility, limiting the ultimate channel thickness to about 3nm. Two-dimensional transition metal dichalcogenides (TMDs), such as MoS2 and WSe2, are attractive in part because they avoid this limitation. With no out-of-plane dangling bonds and at... » read more

The Other Side Of The Wafer: The Latest Developments In Backside Power Delivery


At the beginning of my career in semiconductor equipment, the backside of the wafer was a source of anxiety. In one memorable instance in my early career, several wafers flew off a robot blade during a wafer transfer. After cleaning up the mess, we remembered that a variety of thin films could be deposited on the wafer backside, which could decrease its friction coefficient. Slowing down the wa... » read more

Tomorrow’s Semiconductor Workforce


With tens of billions directly allocated to spur growth in this essential industry, now is the time for us to focus on a critical challenge: ensuring that as this industry grows exponentially, we create a pipeline for the next generation of semiconductor workers, from the manufacturing floor to the design suites. The semiconductor industry’s growth will ripple throughout the nation, creating ... » read more

As Chiplets Go Mainstream, Chip Industry Players Collaborate to Overcome New Development Challenges


The semiconductor industry is building a comprehensive chiplet ecosystem to seize on the advantages of the devices over traditional monolithic system-on-chips (SoCs) such as improved performance, lower power consumption, and greater design flexibility. With heterogeneous integration (HI) presenting significant challenges, collaboration to fulfill the potential of chiplets has become even more i... » read more

Mapping The Future Of Lithography


The SPIE Advanced Lithography + Patterning (AL+P) Symposium is always an informative event for lithographers, and looking at the Advance Program, it appears that AL+P 2023 will be no exception. The progress being made on key lithographic challenges is consistently of interest to attendees, and there will be many timely presentations that address issues of current significance. For example, r... » read more

Modeling Analytics for Computational Storage


This paper discusses the expected performance benefits of offloading some important basic database operations — namely Scan, Filter and Project — to computational storage. We evaluate the performance estimate model using TPC-DS workload and two database engines running on Hadoop clusters: SPARK- SQL and Presto. This paper is organized as follows: after covering previous computational sto... » read more

American Innovation, American Growth: A Vision For The National Semiconductor Technology Center


In the paper, MITRE Engenuity and The Semiconductor Alliance take on the task of defining the principles by which the NSTC should be established to ensure that the U.S. makes the most of this opportunity to bring substantial funding and cross-sector collaboration to bear on the challenge of driving U.S. leadership in semiconductors for decades to come. Click here to read more. » read more

Automotive MCUs: Digital Twin of the LBIST Functionality


A new technical paper titled "A Novel LBIST Signature Computation Method for Automotive Microcontrollers using a Digital Twin" was written by researchers at Infineon Technologies, University of Bremen, and DFKI GmbH. Abstract "LBIST has been proven to be an effective measure for reaching functional safety goals for automotive microcontrollers. Due to a large variety of recent innovative fea... » read more

← Older posts Newer posts →