Body Bias: What It Is, And Why You Should Care

In case you hadn’t noticed, the use of integrated circuits (ICs) has exploded over the past decade. From the cheapest novelty toy to automobiles to implanted medical devices, it seems like everything we touch has an electronic component in it somewhere. Not surprisingly, that growth has brought with it a vastly expanded number and variety of IC design requirements that design companies must satisfy. Every level of performance—from ensuring our cell phones have enough battery power to be available throughout the day, to making certain that those assisted braking devices in our cars work every time—depends on those ICs working the way they’re intended to. Decreasing energy usage to increase battery life means ICs may need to be able to operate in ultra-low power mode. At the same time, many products require high performance circuitry to provide responsive and consistent performance. One technique every designer should know is how to use a device’s body bias effect to tune a circuit’s behavior to meet both power and performance specifications.

What is body bias?
Body bias is used to dynamically adjust the threshold voltage (V_t) of a CMOS transistor. While CMOS transistors are usually thought of as having three terminal devices, with terminals for the source, gate, and drain, it’s increasingly common to have a fourth terminal connected to the body (substrate). Because the voltage difference between the source voltage (V_s) and body voltage (V_b) affects the V_t, the body can be thought of as a second gate that helps determine how a transistor turns on and off.

Under normal operation, an unbiased device has a matching V_s and V_b. Altering the voltage of the device’s bulk connection places the device into either a forward or reverse body bias regime, changing the effective V_t required to turn the device on. While V_s remains at nominal voltage, V_b will be either higher or lower than V_s. This delta translates roughly to a difference in V_t. Depending on the polarity of the body bias, this altered V_t gives the device either a faster or slower on time (t_ON) than normal (Figure 1). A forward body bias lowers the V_t required to turn the device on (V_t(fb)), which allows the device to turn on quickly for high performance (t_ONFB), but the device then has a higher leakage current. Conversely, if the device is put into a reverse body bias, it raises the required V_t for the device to turn on (V_t(rb)). This increased V_t increases the time it takes for the device to turn on (t_ONRB), but also lowers the leakage current, which is useful from a power efficiency standpoint.

Figure 1: Simplified display of how the body bias effect can alter the t_ON for a PMOS transistor. V_s remains at nominal voltage, while V_b increases (reverse bias) or decreases (forward bias). This produces a similar increase or decrease in t_ON, respectively.

What you need to know when using body bias
While modifying device behavior by using forward and reverse body bias can be useful, designers must be sure they thoroughly understand the requirements of a given design. If any devices meant to be placed under normal body bias operation are connected to the wrong domain, it can degrade the performance of the IC. Depending on the extent of the misconnected devices, the mistake can end up causing reliability issues, or the part may no longer meet the required specifications. Designers must use thorough and accurate verification to validate that the bias conditions of all devices within a design are properly set.

Although simple designs may not convey the need for this comprehensive validation, it becomes readily apparent as designs become more complex. When multiple power domains are introduced into a design, the possibility of a device being connected to an incorrect domain increases. This potential only grows greater as the size of each design and the number of domains increase, and specific forward or reverse biasing domains are introduced. Any undesired connection is likely to inflict harmful effects on the associated circuitry. Without a proper verification methodology, the overall quality of a product quickly becomes suspect—not good for anyone’s bottom line.

Reverse body bias increases the stress on a device, which can lead to device degradation over time, reducing its expected lifecycle and/or performance. One observable form of this degradation is a decrease of breakdown voltage values. Studies also show that extended reverse bias stress can lead to an elevated on resistance value in a device, which can affect circuit performance. To maintain a design’s optimal performance and lifetime, only devices specifically designed to handle this additional stress should be placed into reverse body bias conditions.

Careful design methodologies must also be used in conjunction with forward-body-biased conditions to offset the increased leakage current that results from using forward body bias to reduce the delay in a circuit. Since these leakage-reducing techniques are only used on devices that are expected to be in forward body bias, any device erroneously placed into forward body bias won’t have this additional circuitry in place, introducing additional stress on the power usage of the design. If this situation occurs for an entire group of devices, it’s possible for the collective impact to exceed power specifications.

Moreover, if any devices are meant to be placed into forward body bias to perform their function within a circuit, it’s possible that an improper body connection can render an entire section of circuitry nonfunctional. This failure could be due either to the threshold voltage of the unbiased device being higher than the operating point of the circuitry, or for the increased delay of a device or series of devices to exceed the timing tolerances of the circuit. Similarly, if a device is meant to be placed into reverse body bias conditions to reduce leakage current, it’s possible for leakage values to exceed specifications if these devices are not properly biased.

Body bias verification
Given the potential repercussions of improper bias conditions, designers obviously need a good bias verification process. The most basic validation process is a visual inspection of the design, which relies on the inspector not only having the in-depth knowledge of all aspects of a design to identify any devices or circuitry that have a body connection to the wrong domain, but also not overlooking any incorrect connections. In addition to the human error potential, the process of comprehensively validating every portion of the design via visual inspection is a time-consuming process, and increasingly difficult to manage due to growing design complexity. As this design complexity continues to increase, it’s progressively more difficult to have full confidence that a manual verification process provides accurate, comprehensive coverage.

Logically, then, the next stage is the use of electronic design automation (EDA) tools to automatically identify any bias problem locations that may exist in a design. However, depending on what methodology a tool uses for bias verification, there may be deficiencies in its solution. Some tools use dynamic simulation to calculate values throughout a design. These processes can struggle to provide turnaround times that facilitate an efficient design cycle. Other methods rely on marker layers or text annotations being manually placed into the layout to drive the identification of pertinent data. Not only does this process reintroduce the human error component, but it is also limited to use in the post-layout design phase, a time when changes can be difficult or costly to implement.

Equally important is how errors are presented. Just identifying and reporting body bias errors is insufficient to provide a working solution. Designers must be able to see where an error occurred, what the failure mechanism of the error is, and have enough information to determine the necessary and appropriate fix.

An effective automated body bias verification solution must first be able to determine the levels of electric potential throughout the design without relying on SPICE simulations or drawing marker layers as identifiers. Once this information has been efficiently identified, it can be used to understand and validate a particular device’s bias condition and compare it to the expected body bias state (unbiased, forward-biased, or reverse-biased).

With detailed information about erroneously-biased devices, designers can easily identify the root cause behind any reported body bias error condition (Figure 2). For example, the root cause could simply be a direct connection to an incorrect domain, or it could be a harder-to-identify problem, such as a previously unidentified short within a design or an unanticipated path through a set of devices. An in-depth report provides the necessary information that allows designers to quickly identify the problem and improve overall turn-around-time.

Figure 2: Results of a device body bias check providing a detailed explanation of the error.

Summary
Accurate, fast validation of all body bias conditions within designs of ever-increasing complexity poses a challenge for designers working with today’s high performance, low power requirements. The hazards introduced by a device placed into an incorrect body bias condition, or a device that does not meet the required ratings for its assigned body bias condition, can have a damaging effect on the power consumption and performance of a design. Precise, fast, automated body bias verification is a critical factor in the fulfillment of demanding performance and reliability specifications.