Low-Power Design Becomes Even More Complex


Throughout the SoC design flow, there has been a tremendous amount of research done to ease the pain of managing a long list of power-related issues. And while headway has been made, the addition of new application areas such as AI/ML/DL, automotive and IoT has raised as many new problems as have been solved. The challenges are particularly acute at leading-edge nodes where devices are power... » read more

Machine Learning Inferencing Moves To Mobile Devices


It may sound retro for a developer with access to hyperscale data centers to discuss apps that can be measured in kilobytes, but the emphasis increasingly is on small, highly capable devices. In fact, Google staff research engineer Pete Warden points to a new app that uses less than 100 kilobytes for RAM and storage, creates an inference model smaller than 20KB, and which is capable of proce... » read more

Inferencing At The Edge


Geoff Tate, CEO of Flex Logix, talks about the challenges of power and performance at the edge, why this market is so important from a business and technology standpoint, and what factors need to be balanced. » read more

Week In Review: Design, Low Power


M&A NXP will acquire Marvell's Wi-Fi Connectivity business in an all-cash, asset transaction valued at $1.76 billion. The deal includes the Wi-Fi and Bluetooth technology portfolios and related assets; the business employs approximately 550 people worldwide. The deal is expected to close by calendar Q1 2020. Tools Cadence unveiled a data center-optimized FPGA-based prototyping system, ... » read more

Shift-Left Low Power Verification With UPF Information Model


By Himanshu Bhatt, Shreedhar Ramachandra and Narayanan Ganesan Low power testbenches today have no visibility of the UPF objects and their states during a low power simulation. This has been one of the factors limiting the users from writing re-usable low power testbenches that can monitor the UPF objects and react to the state changes of UPF objects. To meet this requirement for the user to... » read more

ASIC/IC Trends With A Focus On Factors Of Silicon Success


“The more you know, the more you know you don't know.” ― Aristotle, 4th C. BC When Aristotle uttered this humble aphorism, he wasn’t telling us to throw up our hands and not bother with learning. He was encouraging us to continue digging deeper, to get answers and ask questions of those answers — that the thrills and rewards of study are truly without end. This is a big part of ou... » read more

Week In Review: Design, Low Power


Intel acquired vision and video FPGA IP company Omnitek. Founded in 1998, the Basingstoke, England-based company has produced FPGA IP cores for video processing including conversion and enhancement, creating arbitrary image warps on a real time video stream, connectivity, and deep learning and AI inferencing. Terms of the deal were not disclosed. Qualcomm and Apple have dropped all litigatio... » read more

Target: 50% Reduction In Memory Power


Memory consumes about 50% or more of the area and about 50% of the power of an SoC, and those percentages are likely to increase. The problem is that static random access memory (SRAM) has not scaled in accordance with Moore's Law, and that will not change. In addition, with many devices not chasing the latest node and with power becoming an increasing concern, the industry must find ways to... » read more

Week In Review: Design, Low Power


Synopsys announced several new products: a new test family, a physical verification solution, and a software library for neural net SoCs. TestMAX, the new family of test products, includes soft error analysis and X-tolerant logic BIST for automotive test and functional safety requirements. TestMAX enables test through functional high-speed interfaces and supports early validation of DFT logi... » read more

Week In Review: Design, Low Power


Cadence debuted Denali Gen2 IP for LPDDR5/4/4X in TSMC's 7nm FinFET process technology. The offering consists of PHY, controller and Verification IP. It supports both the pre-release LPDDR5 standard and LPDDR4/4X devices as well as Arm AMBA AXI buses and reliability features like in-line error correcting codes. The LPDDR5 standard provides up to 1.5x bandwidth over LPDDR4 and LPDDR4X. The US... » read more

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