Seeing Is Believing: Visualizing Full Coverage Closure In Low-Power Designs


By Madhur Bhargava and Durgesh Prasad Lowering the power consumption and leakage in SoCs and other electrical designs has become a paramount concern in recent years. The reasons for this are many and well understood. The structures and techniques we use to accomplish this have made verification of so called low-power designs more complex and difficult than it is for designs where power usage... » read more

Week In Review: Design, Low Power


Tools & IP Synopsys debuted its new DesignWare ARC EV7x Embedded Vision Processor family for machine learning and AI edge applications. The ARC EV7x Vision Processors integrate up to four enhanced vector processing units (VPUs) and an optional Deep Neural Network (DNN) accelerator with up to 14,080 MACs to deliver up to 35 TOPS performance in 16nm FinFET process technologies under typical ... » read more

Another Brick Or Two In The Chip Design Wall


Physical challenges come and go in the semiconductor world. But increasingly, they also stick around, showing up in inconvenient places at the worst time. The chip industry has confronted and solved some massive challenges over the years. There was the 1 micron lithography wall, which was supposed to be impenetrable. That was followed by the 193nm litho challenge, which cost many billions of... » read more

Simplifying Ultra-Low Power System Design


By Paul Hill and Gordon MacNee With any low-power design, the designer has the choice between choosing low-power components or switching off the power to peripheral devices. When considering the choice of non-volatile flash memories, the designer has these same two options available to them – each of which has its pros and cons from system operation, power consumption and reliability persp... » read more

Nvidia’s Top Technologists Discuss The Future Of GPUs


Semiconductor Engineering sat down to discuss the role of the GPU in artificial intelligence, autonomous and assisted driving, advanced packaging and heterogeneous architectures with Bill Dally, Nvidia’s chief scientist, and Jonah Alben, senior vice president of Nvidia’s GPU engineering, at IEEE’s Hot Chips 2019 conference. What follows are excerpts of that conversation. SE: There are ... » read more

Low-Power Design Becomes Even More Complex


Throughout the SoC design flow, there has been a tremendous amount of research done to ease the pain of managing a long list of power-related issues. And while headway has been made, the addition of new application areas such as AI/ML/DL, automotive and IoT has raised as many new problems as have been solved. The challenges are particularly acute at leading-edge nodes where devices are power... » read more

Machine Learning Inferencing Moves To Mobile Devices


It may sound retro for a developer with access to hyperscale data centers to discuss apps that can be measured in kilobytes, but the emphasis increasingly is on small, highly capable devices. In fact, Google staff research engineer Pete Warden points to a new app that uses less than 100 kilobytes for RAM and storage, creates an inference model smaller than 20KB, and which is capable of proce... » read more

Inferencing At The Edge


Geoff Tate, CEO of Flex Logix, talks about the challenges of power and performance at the edge, why this market is so important from a business and technology standpoint, and what factors need to be balanced. » read more

Week In Review: Design, Low Power


M&A NXP will acquire Marvell's Wi-Fi Connectivity business in an all-cash, asset transaction valued at $1.76 billion. The deal includes the Wi-Fi and Bluetooth technology portfolios and related assets; the business employs approximately 550 people worldwide. The deal is expected to close by calendar Q1 2020. Tools Cadence unveiled a data center-optimized FPGA-based prototyping system, ... » read more

Shift-Left Low Power Verification With UPF Information Model


By Himanshu Bhatt, Shreedhar Ramachandra and Narayanan Ganesan Low power testbenches today have no visibility of the UPF objects and their states during a low power simulation. This has been one of the factors limiting the users from writing re-usable low power testbenches that can monitor the UPF objects and react to the state changes of UPF objects. To meet this requirement for the user to... » read more

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