tag: low power

IoT Building Block: Touch Interface HMI
By Jason Chien - 08 Jan, 2024 - Comments: 0

Many IoT devices have started to include touch screen interfaces as part of their UI to make the devices more intuitive and easier to use. A great interface can make customers really love and want to use your IoT product, but a poor HMI interface makes the device unusable damaging the brand value. Given this impact a touch interface can have on your IoT device, it made me wonder what are the... » read more

RTL Optimization Best Practices Help To Achieve Power Goals And Identify Reliability Issues Earlier
By Qazi Faheem Ahmed - 09 Nov, 2023 - Comments: 0

Designers face enormous challenges for low-power designs. Whether it is IoT at the edge, AI in the datacenter, robotics or ADAS, the demand for increased functionality and higher performance in SoCs is rapidly stretching power budgets to their breaking point. Power must be considered at every stage of chip design. Waiting to address power until late in the design cycle – post-netlist or durin... » read more

Developing Energy-Efficient AI Accelerators For Intelligent Edge Computing And Data Centers
By William Ruby - 10 Aug, 2023 - Comments: 0

Artificial intelligence (AI) accelerators are deployed in data centers and at the edge to overcome conventional von Neumann bottlenecks by rapidly processing petabytes of information. Even as Moore’s law slows, AI accelerators continue to efficiently enable key applications that many of us increasingly rely on, from ChatGPT and advanced driver assistance systems (ADAS) to smart edge device... » read more

A Highly Wasteful Industry
By Brian Bailey - 25 May, 2023 - Comments: 1

The systems industry as a whole is not concerned about power. I know that is a bold statement, but I believe it to be true. The semiconductor industry is mildly concerned, but only indirectly. They care about power because thermal issues are limiting the functionality they can squeeze onto a chip, or in a package. Some users, such as data center operators, claim to care about power because i... » read more

Achieving Your Low Power Goals With Synopsys Ultra Low Leakage IO
By Synopsys - 10 May, 2023 - Comments: 0

The demand for low power design has intensified with shrinking geometries. At the same time, innovation in battery operated, handheld devices has increased the design complexity by adding more and more functionality. The focus is on power-optimized designs while maintaining low cost and reduced risk. Designers face these complex and contradictory challenges: developing products with the lowest ... » read more

How eMRAM Addresses The Power Dilemma In Advanced-Node SoCs
By Rahul Thukral - 13 Apr, 2023 - Comments: 0

By Rahul Thukral and Bhavana Chaurasia Our intelligent, interconnected, data-driven world demands more computation and capacity. Consider the variety of smart applications we now have. Cars can transport passengers to their destinations using local and remote AI decision-making. Robot vacuum cleaners keep our homes tidy, and smartwatches can detect a fall and call emergency services. With hi... » read more

Low-Power IC Design Without Compromise
By Janet Attar - 09 Mar, 2023 - Comments: 0

In the process of creating ICs, the digital implementation stage is focused on meeting the performance, power, and area (PPA) targets defined for the design. Traditionally, when talking about PPA metrics, “performance” has been the primary focus, with power and area recovered where possible, after meeting timing. But as designs have moved to smaller, more advanced process nodes, and as s... » read more

How Low Can You Go? Pushing The Limits Of Transistors
By Synopsys - 08 Mar, 2023 - Comments: 0

Deep low voltage enablement of embedded memories and logic libraries to achieve extreme low power: Rising demand for cutting-edge mobile, IoT, and wearable devices, along with high compute demands for AI and 5G/6G communications, has driven the need for lower power systems-on-chip (SoCs). This is not only a concern for a device’s power consumption when active (dynamic power), but also when... » read more

Ternary LIM Operation of the TNAND and TNOR Universal Gates Using DG Feedback FETs
By Technical Paper Link - 04 Mar, 2023 - Comments: 0

A technical paper titled "Logic-in-Memory Operation of Ternary NAND/NOR Universal Logic Gates using Double-Gated Feedback Field-Effect Transistors" was published by researchers at Korea University. Abstract "In this study, the logic-in-memory operations are demonstrated of ternary NAND and NOR logic gates consisting of double-gated feedback field-effect transistors. The component transistor... » read more

Improving Performance And Power With HBM3
By Andy Patrizio - 30 Jan, 2023 - Comments: 0

HBM3 swings open the door to significantly faster data movement between memory and processors, reducing the power it takes to send and receive signals and boosting the performance of systems where high data throughput is required. But using this memory is expensive and complicated, and that likely will continue to be the case in the short term. High Bandwidth Memory 3 (HBM3) is the most rece... » read more

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