Cloud HPC For AI: Addressing Latency, Cost, And Scale At The Architectural Level


Many organizations assume that moving HPC workloads to the cloud is simply a matter of lifting and shifting on-premises clusters. In practice, that approach often erodes performance, inflates costs, and undermines AI training efficiency. Getting the most out of HPC in the cloud requires a fundamentally different architectural approach — one that minimizes latency, maximizes utilization, an... » read more

Mastering 3D-IC Verification Complexity


The semiconductor industry's transition from traditional 2D integrated circuits to 2.5D and 3D-IC configurations represents more than an incremental advancement. This architectural shift, driven by the need to push beyond conventional scaling limitations, introduces a cascade of verification challenges that legacy methodologies struggle to address. As designs incorporate multiple stacked dies, ... » read more

Clocked DDR5 Client Memory Modules Enable Scaling To 9600 MT/s For AI PCs


AI PCs are driving a new class of client workloads that behave very differently from traditional productivity or multimedia applications. Agentic AI systems are expected to plan, execute, and adapt in real time, maintaining persistent context while orchestrating multiple concurrent tasks. These usage patterns place sustained pressure on the memory subsystem, requiring not only higher peak bandw... » read more

How To Start Building Edge-Native AI


Cloud AI enables features like voice assistants and recommendations via centralized data centers, but it relies on consistent network connectivity, which often fails in real-world conditions. Edge-native AI shifts inference to devices such as phones, cars, and sensors, enabling real-time processing, enhanced privacy, and operational resilience. Why edge AI outpaces cloud Edge AI addresses key... » read more

Building A Production-Ready Optically Connected Rack For AI Scale-Up


By Nandita Aggarwal and Nicholas Chang As AI models drive compute demand, servers keep getting bigger. Rack‑scale AI systems (such as the 72-GPU systems from NVIDIA or AMD) enable many GPUs to work together through system-level optimization. They push beyond the limits of single-chip performance and meet the soaring compute needs of the AI era. But this is just the beginning. The next s... » read more

DDR5 MRDIMM: A Transformational Evolution For DDR5 DIMM


DDR5 is the latest generation of DDR server memory capable of supporting data rates of up to 9,200 Mbps, which is a huge leap over the previous generation of DDR memories. It is used in a wide variety of applications, with the huge server and data center market being the key driver behind the adoption of DDR5-based memory systems. As systems move towards more CPU cores, bandwidth, and capacity,... » read more

Re-Architecting Die-to-Die IO For AI


By Lakshmi Jain and Wei-Yu Ma As AI-driven workloads continue to push the boundaries of compute scale, power efficiency, and bandwidth density, conventional die-to-die interconnect technologies—such as SerDes-based links and wide parallel IO—are increasingly becoming limiting factors. These approaches struggle to meet the growing demands for higher bandwidth density and improved energy e... » read more

Beyond The Demo: Deploying And Evaluating Open-Source AI Workloads


As more open-source AI models move closer to real-world adoption, developers are changing how they evaluate edge deployment. The question is no longer simply whether a model can run, but whether it can be deployed reproducibly on a concrete platform, observed in practice, and turned into meaningful deployment decisions based on actual technical evidence. For developers, the CIX Armv9 platfor... » read more

Why Vision LLMs Force A Rethink Of Edge AI Hardware


As vision-centric large language models move on-device, performance measured in raw TOPS is no longer enough. Architectures need to be built around real workloads, memory behavior, and sustained utilization, especially at the edge. Vision LLMs are changing the edge AI equation For the last decade, most edge AI silicon has been built to do one job extremely well: run convolutional networks for... » read more

SOCAMM2: Bringing LPDDR5X Benefits To AI Servers


The rapid scaling of artificial intelligence is reshaping nearly every dimension of data center design. While much of the focus has been on GPUs, accelerators and advanced packaging, another constraint is emerging as equally critical: power. As AI models grow larger and more complex, power consumption, not raw compute, is increasingly the limiting factor in system scalability. Modern AI work... » read more

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