category: Blogs – LPHP

category: IoT, Security & Automotive

Electromagnetic Analysis and Signoff: Cost Savings
By Magdy Abadir - 18 Sep, 2018 - Comments: 0

By Nikolas Provatas and Magdy Abadir We are often asked by SoC design teams about the benefits of an electromagnetic analysis and signoff methodology. Here is an overview of some of the big “cost savings”. Time to Market Savings Utilizing an EM crosstalk analysis and signoff methodology provides designers with an “insurance policy” against the risk of EM coupling in their SOC des... » read more

The Security Penalty
By Ed Sperling - 13 Sep, 2018 - Comments: 0

It's not clear if Meltdown, Spectre and Foreshadow caused actual security breaches, but they did prompt big processor vendors like Intel, Arm, AMD and IBM to fix these vulnerabilities before they were made public by Google's Project Zero. While all of this may make data center managers and consumers feel better in one respect, it has created a level of panic of a different sort. For decades,... » read more

Solving Puzzling Power-Aware Coverage: Getting An Aggregated Coverage Metric
By Progyna Khondkar - 13 Sep, 2018 - Comments: 0

Coverage metrics tell us when a design has been thoroughly verified, or at least exercised to the point of diminishing returns. Rarely can every design artifact or design parameter of a highly complex design be covered 100 percent, but we can use coverage metrics to know the extent to which we have verified the design — enough to be confident that it will function as desired in the end produc... » read more

Designers Face Growing Problems With On-Chip Power Distribution
By Marc Swinnen - 13 Sep, 2018 - Comments: 0

The technology evolution in semiconductor manufacturing has led to chips with ever-higher power densities, which is leading to serious problems with on-chip power distribution. Specifically, the problems surrounding voltage drop—or IR drop (from V=IxR)—have become so acute that we have seen multiple companies starting to get back dead silicon from the fab. For example, a recent 7nm chip ... » read more

Mission Profiles
By Jens Michael Warmuth - 13 Sep, 2018 - Comments: 0

In the field of electronic systems, the mission profile has been one of the key concepts since the start of the scientific examination of the subject of reliability. Its exact meaning varies with time and the industry using it. In particular, over the course of increasing digitalization and networking in the context of IoT and the opportunities resulting from this, the subject of mission profil... » read more

5 Reasons Why In-Chip Monitoring Is Here To Stay
By Ramsay Allen - 13 Sep, 2018 - Comments: 0

When the first car rolled off his production line in 1913, Henry Ford would have already envisioned just how prolific the automobile would become. However, would he have foreseen the extent to which monitors and sensors would become critical to the modern internal combustion engine? The requirement for energy efficiency, power performance and reliability in high volume manufactured vehicles ... » read more

Is Your AI SoC Secure?
By Dana Neustadter - 13 Sep, 2018 - Comments: 0

As artificial intelligence (AI) enters every application, from IoT to automotive, it is bringing new waves of innovation and business models, along with the need for high-grade security. Hackers try to exploit vulnerabilities at all levels of the system, from the system-on-chip (SoC) up. Therefore, security needs to be integral in the AI process. The protection of AI systems, their data, and th... » read more

Open Throttle On Automotive Innovation
By Brian Fuller - 13 Sep, 2018 - Comments: 0

Like a race car accelerating out of a turn, the autonomous and semi-autonomous vehicle market is expanding faster than a lot of people expected. IHS Markit, for example, reported earlier this year that more than 33 million autonomous vehicles will be sold globally in 2040. The growth rate, IHS Markit suggests, is going to be torrid since the first year of significant volume for autonomous vehic... » read more

More Performance At The Edge
By Ed Sperling - 09 Aug, 2018 - Comments: 0

Shrinking features has been a relatively inexpensive way to improve performance and, at least for the past few decades, to lower power. While device scaling will continue all the way to 3nm and maybe even further, it will happen at a slower pace. Alongside of that scaling, though, there are different approaches on tap to ratchet up performance even with chips developed at older nodes. This i... » read more

Power Reduction In A Constrained World
By Rob Knoth - 09 Aug, 2018 - Comments: 0

Back when 40-28nm were new, leakage power for wireless designs dominated the optimization technology focus. This led to multiple VT optimization and power intent management for digital designs to minimize or shut off leakage. As wireless devices moved to FinFET nodes, dynamic power became dominant. As a result, optimization technology focus shifted to build up dynamic techniques to complement y... » read more

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