ConvNext Runs 28X Faster Than Fallback


Two months ago in our blog we highlighted the fallacy of using a conventional NPU accelerator paired with a DSP or CPU for “fallback” operations. (Fallback Fails Spectacularly, May 2024). In that blog we calculated what the expected performance would be for a system with a DSP needing to perform the new operations found in one of today’s leading new ML networks – ConvNext. The result wa... » read more

224Gbps PHY For The Next Generation Of High Performance Computing


Large language models (LLMs) are experiencing an explosive growth in parameter count. Training these ever-larger models requires multiple accelerators to work together, and the bandwidth between these accelerators directly limits the size of trainable LLMs in High Performance Computing (HPC) environments. The correlation between the LLM size and data rates of interconnect technology herald a... » read more

A Guide To Rigid-Flex PCB Design


In today’s electronics industry, compact, efficient, and versatile PCBs are in high demand. Rigid-flex technology allows engineers to design boards that bend and flex without compromising performance or reliability. Mastering rigid-flex PCB design can be challenging due to its unique requirements. Whether you're an experienced designer expanding your skills or new to the field, this ar... » read more

Sensor Requirements For Developing Robust Environment Perception Systems


In recent years, sensor systems for environment perception have become increasingly important – whether for adaptive robotics, automated driving, industrial process and quality control, or condition monitoring. The aim is always to detect and interpret certain environmental characteristics. In doing so, it’s important to choose not only the right algorithm but also the right sensor or senso... » read more

PCIe 7.0: Speed, Flexibility & Efficiency For The AI Era


As the industry came together for PCI-SIG DevCon last month, one thing took center stage, and that was PCI Express 7.0. While still in the final stages of development, the world is certainly ready for this significant new milestone of the PCIe specification. Let’s look at how PCIe 7.0 is poised to address the escalating demands of AI, high-performance computing, and emerging data-intensive ap... » read more

PCIe 6.0 Address Translation Services: Verification Challenges And Strategies


Address Translation Services (ATS) is a mechanism in PCIe that allows devices to request address translations from the Input/Output Memory Management Unit (IOMMU). This is particularly important where devices need to access virtual memory. ATS enhances performance by enabling devices to cache translations, reducing the latency associated with memory access. This blog delves into the semantics ... » read more

On-Device Speaker Identification For Digital Television (DTV)


In recent years, the way we interact with our TVs has changed. Multiple button presses to navigate an on-screen keyboard have been replaced with direct interaction through our voices. While this has resulted in significant improvements to the Digital Television (DTV) user experience, more can be done to provide immersive and engaging experiences. Imagine you say, “recommend me a film” or... » read more

How Simulation Addresses Hydrogen Fuel Challenges


By Kiyoung Jung and Kyutae Kim Hydrogen has gained the front seat as a fuel for carbon neutrality. The absence of carbon emission at the point of utilization makes it attractive for net-zero initiatives. Hydrogen fuel possesses qualities like higher flame speed (8x higher), lower ignition energy requirements (15x lower), and wider flammability limit (4% to 70%) compared to typical hydrocar... » read more

CHIPS For America’s National Semiconductor Technology Center (NSTC) Program


At this year’s Design Automation Conference, Jay Lewis, director of CHIPS for America National Semiconductor Technology Center (NSTC) Program, gave a presentation on the status and direction of the Center, its priorities for this year and how the NSTC can change the long-term trajectory for innovation. Fig. 1: Dr. Jay Lewis, director of NSTC Program, CHIPS R&D Office at the Dept. o... » read more

Advances in 3D-IC At DAC 2024


At the 2024 Design Automation Conference and Exhibit, Ansys, in collaboration with NVIDIA, has been showcasing its latest advances in 3D-IC multiphysics analysis, visualization, and signoff. Ansys solutions are on display for thermal integrity, power integrity, signal integrity, and mechanical integrity for multi-die (3D-IC) electronic assemblies. The DAC Exhibitor Forum sessions, sponso... » read more

← Older posts