Thinking About AI Power In Parallel


Most AI chips being developed today run highly parallel series of multiply/accumulate (MAC) operations. More processors and accelerators equate to better performance. This is why it's not uncommon to see chipmakers stitching together multiple die that are larger than a single reticle. It's also one of the reasons so much attention is being paid to moving to the next process node. It's not ne... » read more

Artificial Intelligence For Industrial Applications


By Dirk Mayer and Olaf Enge-Rosenblatt Due to digitalization, modern machines and systems provide massive quantities of data, which form a significant basis for the optimization of production processes, operations and safety. These data sets, however, grow more and more complex, which renders the simple analysis methods typically used in the past often ineffective. This is one factor driv... » read more

Enabling Integration Success Using High-Speed SerDes IP


By Niall Sorensen and Malini Narayanammoorthi Internet traffic volumes continue to grow at a breakneck pace, and the demands on SerDes speeds increase accordingly. High-speed SerDes play an integral part of the networking chain and these speed increases are required to support the bandwidth demands of artificial intelligence (AI), Internet of Things (IoT), virtual reality (VR) and many more ... » read more

How AI In Edge Computing Drives 5G And The IoT


Edge computing, which is the concept of processing and analyzing data in servers closer to the applications they serve, is growing in popularity and opening new markets for established telecom providers, semiconductor startups, and new software ecosystems. It’s brilliant how technology has come together over the last several decades to enable this new space starting with Big Data and the idea... » read more

Earlier Is Better In Latch-Up Detection


Physical verification is an essential step in integrated circuit (IC) design verification. Foundries provide design rule manuals that specify the precise physical requirements needed to ensure the design can be correctly manufactured, and the verification team runs the layout through checks based on those rules to ensure compliance. However, ensuring that a design can be manufactured does not g... » read more

Moore And More


For more than 50 years, the semiconductor industry has enjoyed the benefits of Moore's Law — or so it seemed. In reality, there were three laws rolled up into one: Each process generation would have a higher clock speed at the same power. This was not discovered by Moore, but by Dennard, who also invented the DRAM. Process generations continue to get faster and lower power, but the power... » read more

The Future Of Embedded Monitoring, Part 1


Shall I compare thee to a…Rolls Royce jet engine? ‘There is a new era dawning whereby deeply embedded sensing within all technology will bring about great benefit for the reliability and performance of semiconductor-based products.’ These were my words during a presentation to an industry audience in China back in September 2015. During that same presentation, somewhat to the consterna... » read more

AI: A Perfect Solution But At What Cost?


The advancement of artificial intelligence (AI) has been a great enabler for the Internet of things (IoT). Given the ability to think for itself, it’s shrugged off its original definition as a network of tiny sensors and grown to incorporate a host of more intelligent AIoT (AI+IoT) devices, from smartphones all the way up to autonomous vehicles. AI has also paved the way for new IoT device... » read more

More Knobs, Fewer Markers


The next big thing in chip design may be really big — the price tag. In the past, when things got smaller, so did the cost per transistor. Now they are getting more expensive to design and manufacture, and the cost per transistor is going up along with the number of transistors per area of die, and in many cases even the size of the die. That's not exactly a winning economic formula, which... » read more

Three Steps To Faster Low Power Coverage Using UPF 3.0 Information Models


Controlling power has its costs. The added power elements and their interactions make verification of low-power designs much more difficult and the engineer’s job overwhelmingly complex and tedious. Early versions of the Unified Power Format (UPF) provided some relief, but lacked provisions for a standardized methodology for low-power coverage. Ad hoc approaches are error prone and highly ... » read more

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