Takeaways From The 2024 SPIE Photomask Technology + EUV Conference

By Harry Levinson - 04 Dec, 2024 - Comments: 0

In the autumn, I had the opportunity to attend the 2024 SPIE Photomask Technology and EUV Lithography conferences, collectively referred to as PUV or sometimes BACUS, the latter a reference to the event’s early association with the BACUS organization. This is a key annual event that brings together experts and professionals in photomask technology and EUV lithography. This year’s conference... » read more

Analysis Of Multi-Chiplet Package Designs And Requirements For Production Test Simplification

By Vineet Pancholi - 21 Nov, 2024 - Comments: 1

In recent years there has been a sharp rise of multi-die system designs. Numerous publications targeting a large variety of applications exist in the public domain. One presentation [2] on the IEEE’s website does a good job of detailing the anecdotal path of multi-die systems by way of chiplet building blocks integrated within a single package [2]. The presentation includes references to a ha... » read more

Using Dummy Patterning To Solve Etch Uniformity Problems

By James Kim - 21 Nov, 2024 - Comments: 0

Semiconductor devices are made up of hundreds of thin layers of materials stacked by multiple deposition and etch processes. Process engineers need to design the best combination of deposition and etch processes to ensure uniformity across an entire chip area and across the silicon wafer. Uniformity is the most common and critical parameter that is monitored in semiconductor fabrication, especi... » read more

Luminary Panel Sees Progress In EUV Pellicle Adoption As Critical For EUV

By Jan Willis - 21 Nov, 2024 - Comments: 0

A significant focus of the 2024 SPIE Photomask and EUV conference was on EUV lithography and high-numerical-aperture (high-NA) EUV lithography, offering the potential to drive resolution to new heights. These EUV solutions bring new challenges such as pellicles, mask inspection, and smaller and smaller minimum mask dimensions. Progress has been impressive, according to lithography luminary Dr. ... » read more

The State Of The EDA Industry In 2024

By Bob Smith - 21 Nov, 2024 - Comments: 0

In what has become a yearly custom, I recently spoke to Jay Vleeschhouwer, Managing Director of Griffin Securities, for an update on his view of the state of the electronic design automation (EDA) industry. My inquiries were based on his presentation at the 2024 Design Automation Conference (DAC). With his long background as an informed EDA industry follower, I knew it would be an enlightening ... » read more

Tuning Design And Process For High-NA EUV Stitching

By Kevin Lucas - 24 Oct, 2024 - Comments: 0

By Kevin Lucas and James Ban Upcoming 14A and 10A process nodes will use high-NA EUV anamorphic scanners, which will require two stitched half-fields to achieve the equivalent wafer exposure area of previous-generation scanners, see figure 1. The lithography patterning at a stitching boundary between two mask exposures will be affected by additional process variation than are encountered in ... » read more

Metal-Oxide-Metal Capacitor Simulation And Modeling By Virtual Fabrication

By Qingpeng Wang - 24 Oct, 2024 - Comments: 0

Metal-Oxide-Metal (MOM) capacitors are passive radio frequency (RF) capacitive devices that are a common component in semiconductor logic chips [1]. A SPICE model of a MOM capacitor is typically used by designers during the design and performance evaluation of logic chip RF circuitry. Traditionally, it may take at least 3 months from the completion of the design layout, wafer fabrication, final... » read more

Luminary Panel Sees Multi-Beam Mask Writers And Curvilinear Masks Key To 193i And EUV

By Jan Willis - 24 Oct, 2024 - Comments: 0

Attendance was up and the mood was optimistic at this year’s SPIE Photomask and EUV conference held September 29 through October 3, 2024. The optimism was apparent as well for multi-beam mask writers and curvilinear masks during the eBeam Initiative’s 15th annual reception and meeting held on October 1. In the eBeam Initiative’s annual Luminaries survey, 93% of those surveyed said that pu... » read more

Revolutionizing IC Packaging With High-Density RDL Technology

By Curtis Zwenger - 24 Oct, 2024 - Comments: 0

The demand for high-performance devices, particularly in AI, HPC, and data centers, has surged dramatically in the ever-evolving landscape of integrated circuit technology. This demand has been further accelerated by the COVID-19 pandemic, pushing the boundaries of silicon technology to its limits. Enter Amkor’s S-SWIFT, a packaging solution designed to address these challenges and revolution... » read more

Multi-Tier Die Stacking Enables Efficient Manufacturing

By Jessica Albright - 24 Oct, 2024 - Comments: 0

Advanced packaging is currently facing a critical challenge to increase manufacturing efficiency without sacrificing device performance. Vertical integration techniques, such as multi-tier die stacking and hybrid bonding, enable increased integration density, therefore improving yield of high-quality devices. However, these highly precise processes require significant attention to defectivity... » read more

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