Energy-Efficient Computing Systems For Sustainable AI


As artificial intelligence (AI) proliferates rapidly, AI models and datasets are also growing rapidly in size. This growth far outpaces performance improvement in hardware systems, and is increasing AI’s energy consumption unsustainably. To address these challenges and explore collaborative solutions, SEMI’s Smart Data-AI Initiative – as part of its Future of Computing focus – r... » read more

Co-Design Optimization For PI/SI When Considering Thermal Performance


When applications become more complex, higher data rates or high frequencies are required. However, with increasing functions, more power dissipation will be generated. Furthermore, temperature is proportional to power dissipation, so electrical performance will also depend on thermal conditions. To determine how temperature impacts power integrity/signal integrity (PI/SI), electrical simulatio... » read more

The Other Side Of The Wafer: Transistor Channel Stress In Backside Power Delivery Networks


As transistor scaling has moved to the angstrom era (18A, 14A, etc.), the issues of interconnect resistance (IR), IR drop, and power loss are becoming more severe. Traditionally, signal lines and power lines are fabricated on the same side of the wafer as the active device. But fabricating everything on one side of the wafer can create a shortage of space and resources at the interconnect la... » read more

TCAD For GPUs And GPUs For TCAD


It is well known that many steps in chip development become exponentially harder as feature sizes shrink and instance counts balloon. Billions of transistors are now commonplace, and wafer-scale devices with trillions are on the horizon. Such massive chips put pressure on every electronic design automation (EDA) tool in the development flow, from front-end architectural modeling to signoff and ... » read more

Innovation And Collaboration In Power Module Packaging: A Thermal Perspective


Power modules are the foundation of modern electrical systems, especially within electric vehicles (xEVs), industrial motor applications, and renewable energy solutions such as wind and solar power. As the demand for more power in smaller and lighter systems grows, managing heat dissipation has become a major challenge, as the thermal energy from high current flows can lead to reliability issue... » read more

Three Ways Curvy ILT Together With PLDC Improves Wafer Uniformity


This is the second blog in a three-part series on pixel-level dose correction (PLDC). The first installment was “Improving Uniformity and Linearity for All Masks” from January 29, 2025. PLDC: A new solution for improving mask and wafer uniformity Improving mask uniformity is the easiest, cheapest way to improve wafer uniformity. Uniformity is a measure of how similarly the exact same feat... » read more

Eliminating Interfacial Delamination in High-Power Automotive Devices


Highly reliable power devices are always demanded by the automotive industry, especially with the surge in electric vehicle (EV) sales. These devices are expected to withstand harsh conditions and, at the same time, deliver consistent performances. Interfacial delamination is a significant factor that can impact the reliability performance of power devices. It refers to the separation of lay... » read more

TCAD-Based AI Models For Modern Fab Workflows


The relentless pace of semiconductor development continues unabated. Despite the slowdown in Moore’s law, feature sizes continue to shrink as new geometries come online. Constant innovations in both fab processes and device design offer new opportunities but present new challenges. As in so many other areas of electronics, artificial intelligence (AI) is starting to play a significant role. ... » read more

Improving DRAM Performance Using Dual Work-Function Metal Gate (DWMG) Structures


Dynamic Random Access Memory (DRAM) serves as the backbone of modern computing, enabling devices ranging from smartphones to high-performance servers. As the demand accelerates for higher density and lower power consumption in memory devices, innovation in reducing DRAM leakage currents and enhancing performance becomes essential. One significant challenge in scaling DRAM technology is gate-... » read more

Reflecting On The SPIE Advanced Lithography + Patterning Symposium 2025


The mood at this year’s SPIE Advanced Lithography + Patterning Symposium was decidedly upbeat. The outlook for business is good, due in large measure to expectations of high demand for chips, driven by artificial intelligence (AI). To realize the potential of AI, increases in chip performance and efficiency are needed, which, in turn, requires advanced patterning. In the Symposium’s technic... » read more

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