Tuning Design And Process For High-NA EUV Stitching

By Kevin Lucas - 24 Oct, 2024 - Comments: 0

By Kevin Lucas and James Ban Upcoming 14A and 10A process nodes will use high-NA EUV anamorphic scanners, which will require two stitched half-fields to achieve the equivalent wafer exposure area of previous-generation scanners, see figure 1. The lithography patterning at a stitching boundary between two mask exposures will be affected by additional process variation than are encountered in ... » read more

Bringing Curvilinear Data To Mask Data Prep

By Al Blais - 15 Aug, 2024 - Comments: 0

Advanced nodes that have been leveraging curvilinear correction with technologies such as ILT and curvilinear OPC are increasingly requiring the use of curvilinear masks to meet advanced feature size and pitch requirements. However, building curvilinear masks with standard OASIS file formats can come at the cost of large file sizes, increased turnaround time, and reduced quality of results. The... » read more

Metrology Analysis Tool For Photolithography Process Characterization At Advanced Nodes

By Wolfgang Demmerle - 23 Jul, 2024 - Comments: 0

Continued scaling of integrated circuits to smaller dimensions is still a viable way to increase compute power, achieve higher memory cell density, or reduce power consumption. These days, chip makers are using single-digit nanometer figures or even Angstrom to label their manufacturing technology nodes, which are associated with the size of features patterned during the lithography process. ... » read more

Applying Machine Learning To Accelerate TCAD Calibration

By Dwight Hunter - 20 Jun, 2024 - Comments: 0

TCAD models are the fundamental building blocks for the semiconductor industry. Whether it is a new process node or a new multi-billion dollar fab, accurate TCAD models must be developed and calibrated before they can be deployed in technology development. While TCAD models have been around for (many) decades, their complexity is growing exponentially, as is the demands placed on the R&D en... » read more

Accelerating Innovation With An E-Beam Lithography System

By Al Blais - 23 May, 2024 - Comments: 0

By Al Blais and Johnny Yeap Traditional lithography remains a standard in the industry, providing precision and a relatively cost-effective way to create patterns on the wafer when producing very high volumes of chips. However, cycle times can be long depending on the complexity of the masks that must be made. The emergence of maskless e-beam lithography is providing a complementary path ... » read more

Enabling New Applications With SiC IGBT And GaN HEMT For Power Module Design

By Shela Aboud - 18 Apr, 2024 - Comments: 0

The need to mitigate climate change is driving a need to electrify our infrastructure, vehicles, and appliances, which can then be charged and powered by renewable energy sources. The most visible and impactful electrification is now under way for electric vehicles (EVs). Beyond the transition to electric engines, several new features and technologies are driving the electrification of vehicles... » read more

The High NA EUV Imperative: How Computational Lithography Solutions Enable Us To Think Smaller

By Gandharv Bhatara - 21 Mar, 2024 - Comments: 0

The future of computing depends on miniaturization, and extreme ultraviolet lithography (EUV) is one key enabler. Until recently, we have relied on low numerical aperture (NA) EUV systems with an aperture of 0.33 to help us reduce the size of integrated circuits (ICs). As with deep ultraviolet (DUV) technology, this has begun to reach its limits. High NA EUV lithography with a 0.55 aperture rep... » read more

Utilizing Artificial Intelligence For Efficient Semiconductor Manufacturing

By Vivek Jain - 22 Feb, 2024 - Comments: 0

The challenges before semiconductor fabs are expansive and evolving. As the size of chips shrinks from nanometers to eventually angstroms, the complexity of the manufacturing process increases in response. It can take hundreds of process steps and more than a month to process a single wafer. It can subsequently take more than another month to go through the assembly, testing, and packaging st... » read more

Using TCAD To Simulate Wide-Bandgap Materials For Electronics Design

By Shela Aboud - 22 Jan, 2024 - Comments: 0

Wide-bandgap (WBG) semiconductors are a class of materials that can offer a range of advantages over silicon. These materials can operate at higher voltages and higher temperatures, serving as critical enablers of innovation in Power and RF applications and functioning in a wider range of environments that are sometimes extreme. Electronics applications benefit from these wide-bandgap materials... » read more

Smart Manufacturing Advances The Next Generation Of Semiconductor Chips

By Vivek Jain - 19 Dec, 2023 - Comments: 0

Semiconductor devices are ubiquitous in our everyday lives and foundational to today’s communication, education, manufacturing, health, and transportation industries. From the moment our phone’s alarm clock wakes us up to unwinding by streaming our favorite shows, it’s difficult to imagine modern life without the devices that semiconductors enable. To keep pace with performance and ... » read more

← Older posts

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

category: Manufacturing Solutions

category: IoT, Security & Automotive