Additive Techniques For Flexible Hybrid Electronics Packaging And Integration With Human Body


By Gity Samadi and Paul Semenza Flexible hybrid electronics (FHE) has spawned the development of novel packaging techniques to overcome the application limitations of the rigid boards, high-temperature solders, bulky component packages, and insertion processes used in traditional printed circuit boards. Thin, flexible substrates, bare die, and combinations of printed and small-format package... » read more

Insights Into Advanced DRAM Capacitor Patterning: Process Window Evaluation Using Virtual Fabrication


With continuous device scaling, process windows have become narrower and narrower due to smaller feature sizes and greater process step variability [1]. A key task during the R&D stage of semiconductor development is to choose a good integration scheme with a relatively large process window. When wafer test data is limited, evaluating the process window for different integration schemes can... » read more

Production Testing Of Discrete Power Products


By Vineet Pancholi and Dennis Dinawanao Metal Oxide Silicon Field Effect Transistors (MOSFETs), Insulated Gate Bipolar Transistors (IGBTs), Bipolar Junction Transistors (BJTs), diodes, and application specific multi-transistor packaged modules are some of the more popular discrete products. Switches control the flow of current within a circuit. MOSFETs are a building block of most electronic... » read more

How Does Line Edge Roughness (LER) Affect Semiconductor Performance At Advanced Nodes?


BEOL metal line RC delay has become a dominant factor that limits chip performance at advanced nodes [1]. Smaller metal line pitches require a narrower line CD and line to line spacing, which introduces higher metal line resistance and line to line capacitance. This is demonstrated in figure 1, which displays a simulation of line resistance vs. line CD across different BEOL metals. Even without... » read more

Thermal Simulation Of DSMBGA And Coupled Thermal-Mechanical Simulation Of Large Body HDFO


Electronic packaging has continued to become more complex with higher device count, higher power densities and Heterogeneous Integration (HI) becoming more common. In the mobile space, systems that were once separate components on a printed circuit board (PCB) have now been relocated along with all their associated passive devices and interconnects into single System in Package (SiP) style suba... » read more

Smart Manufacturing And Advanced Technical Service


SEMI spoke with Eyal Shekel, senior vice president of Service Strategy and Excellence at Tokyo Electron Limited, about the impact of artificial intelligence (AI) on smart manufacturing and how other fab solutions for smarter process tools are advancing semiconductor manufacturing. SEMI: AI technology is considered a key enabler for smart manufacturing. What are the latest trends? Shekel:... » read more

3D NAND Virtual Process Troubleshooting And Investigation


Modern semiconductor processes are extremely complicated and involve thousands of interacting individual process steps. During the development of these process steps, roadblocks and barriers are often encountered in the form of unanticipated negative interactions between upstream and downstream process modules. These barriers can create a long delay in the development cycle and increase costs. ... » read more

Hybrid Bonding Basics: What Is Hybrid Bonding?


Hybrid bonding is the key to paving an innovative future in advanced packaging. Hybrid bonding provides a solution that enables higher bandwidth and increased power and signal integrity. As the industry is looking to enhance the performance of final devices through scaling system-level interconnections, hybrid bonding provides the most promising solution with the ability to integrate several di... » read more

Collaborating To Decarbonize The Semiconductor Manufacturing Value Chain


By Mousumi Bhat and Peter Spiller SEMICON West 2022 Hybrid gathered experts from across the semiconductor industry for the debut Sustainability Summit to talk about the sustainability of the industry’s growth. Semiconductor chips have become ubiquitous in recent years. All aspects of society have become extremely dependent on semiconductors. The post-pandemic revenue growth of semicondu... » read more

Heterogeneous IC Packaging: Optimizing Performance And Cost


Leading integrated circuit (IC) foundries are already shipping 7-nm and 5-nm wafers and 3-nm product qualifications are ongoing. Wafer costs continue to soar as high transistor density requires ever more expensive processes to fabricate them. Even if defect densities can remain relatively flat as new nodes emerge, the cost per unit area of silicon increases nonlinearly. These economics have pla... » read more

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