Process Control For Next-Generation Memories


The Internet of Things (IoT), Big Data and Artificial Intelligence (AI) are driving the need for higher speeds and more power-efficient computing. The industry is responding by bringing new memory technologies to the marketplace. Three new types of memory in particular—MRAM (magnetic random access memory), PCRAM (phase change RAM) and ReRAM (resistive RAM)—are emerging as leading candidat... » read more

Electronics Industry Business Cycles Look Promising


Although total electronics industry manufacturing activity is still far from expanding (3/12 is below 1.0), key global electronic industry monthly time series appear to have reached their 3/12 bottoms and now have begun to improve (Chart 1). Currently shipments are still shrinking, but at slowing rates. However real growth will only occur when these 3/12s exceed 1.0. Growth rates vary b... » read more

Controlling Variability Using Semiconductor Process Window Optimization


To ensure success in semiconductor technology development, process engineers must set the allowed ranges for wafer process parameters. Variability must be controlled, so that final fabricated devices meet required specifications. These specifications include critical dimensions, electrical performance requirements, and other device characteristics. Pre-production or ramp-up production Si wa... » read more

Falling Chip Forecasts


It’s time to take a pulse of the semiconductor market amid the memory downturn and trade frictions with China. For some time, the DRAM and NAND markets have been hit hard with falling prices and oversupply. Then, the Trump administration last year slapped tariffs on Chinese goods. China retaliated. And the trade war rages on between the U.S. and China. More recently, the U.S. Department... » read more

Material Solutions For FOWLP Die Shift And Wafer Warpage


By Shelly Fowler Today's fan-out wafer-level packaging (FOWLP) processes use organic substrates composed of epoxy mold compound (EMC) created using a thermal compression process. EMC wafers are a cost-effective way to achieve lower-profile packages without using an inorganic substrate to produce chip packages that are thinner and faster without the need for interposers or through-silicon-via... » read more

New Applications Call For New Memory Types


The semiconductor industry is on the verge of a transformative computing era driven by Big Data, Artificial Intelligence (AI) and the Internet of Things (IoT). However, achieving the improvements in computing performance and efficiency needed for new AI and IoT applications represent some of the biggest technology challenges the industry has faced. Among the most critical requirements is del... » read more

Automotive Semiconductors Boost MCU, Analog Markets


Auto sales are expected to experience a slowdown in 2019, and even with the continued increase in electronics per vehicle, automotive semiconductor sales are also expected to experience a slowdown. Similar to prior years, 2019/2020 car models will include more automotive semiconductor devices to provide higher degrees of safety, comfort and convenience, driver assist capabilities, in-cabin ente... » read more

SEMI Calls For U.S.-China Tariff Removals


In testimony today before a U.S. government interagency panel considering tariffs on $300 billion worth of Chinese goods, SEMI called for the removal of about 30 tariff lines, which cover items central to the semiconductor manufacturing process. Mike Russo, vice president of global industry advocacy at SEMI, explained in his testimony that while SEMI strongly supports efforts to better... » read more

Impact Of U.S.-China Trade War


The trade war between the United States and China is escalating and it is here to stay. Last year, the Trump administration started the trade war with China for basically two reasons. First, China has a massive trade surplus with the U.S. Second, U.S. companies have been the subject of IP theft in China, which has largely gone unchecked, according to the Trump administration. Many disagre... » read more

Challenges And Solutions For Silicon Wafer Bevel Defects During 3D NAND Flash Manufacturing


As semiconductor technology scales down in size, process integration complexity and defects are increasing in 3D NAND flash, partially due to larger stack deposits and thickness variability between the wafer center and the wafer edge. Industry participants are working to reduce defect density at the wafer edge to improve overall wafer yield. Attention has focused on common wafer bevel defects s... » read more

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