Testing Cars In Context


The choices for companies developing systems or components that will work in autonomous vehicles is to road test them for millions of miles or to simulate them, or some combination of both. Simulation is much quicker, and it has worked well in the semiconductor world for decades. Simulating a chip or electronic system in context is hard enough. But simulating a system of systems in the real... » read more

New Transistor Types Vs. Packaging


Plans are being formulated for the rollout of multiple types of gate-all-around FETs and literally dozens of advanced packaging options. The question now is which ones will achieve critical mass, because there aren't enough chips in the world to support all of them profitably. FinFETs, which were first introduced by Intel at 22nm, are running out of steam. While they will survive 10/7nm, and... » read more

The Case For Chiplets


Discussion about chiplets is growing as the cost of developing chips at 10/7nm and beyond passes well beyond the capabilities of many chipmakers. Estimates for developing 5nm chips (the equivalent 3nm for TSMC and Samsung) are well into the hundreds of millions of dollars just for the NRE costs alone. Masks costs will be in the double-digit millions of dollars even with EUV. And that's assum... » read more

The Race To Mass Customization


The number of advanced packaging options continues to rise. The choices now include different materials for interposers, at least a half-dozen fan-outs, not to mention hybrid fan-out/3D stacking, system-in-package, flip-chip and die-to-die bridges. There are several reasons for all of this activity. First, advanced packaging offers big improvements in performance and power that cannot be ac... » read more

Is Advanced Packaging The Next SoC?


Device scaling appears to be possible down to 1.2nm, and maybe even beyond that. What isn't obvious is when scaling will reach that node, how many companies will actually use it, or even what chips will look like when foundries actually start turning out these devices using multi-patterning with high-NA EUV and dielectrics with single-digit numbers of atoms. There are two big changes playing... » read more

What’s In The Package?


Putting a variety of chips or hardened IP blocks into a package rather than trying to cram them into a single chip continues to gain ground. But it's also creating its own set of issues around verifying and testing these devices. This problem is well understood inside of SoCs, where everything is integrated into a single die. And looked at from a 30,000-foot perspective, packaging is someth... » read more

Advanced Packaging Still Not So Simple


The promise of advanced packaging comes in multiple areas, but no single packaging approach addresses all of them. This is why there is still no clear winner in the packaging world. There are clear performance benefits, because the distance between two chips in a package can be significantly shorter than the distance that signals have to travel from one side of a die to another. Moreover, wi... » read more

Advanced Packaging Is Suddenly Very Cool


The hottest chip markets today—automotive AI for autonomous and heavily assisted driving, machine learning, virtual and augmented reality—all are beginning to look at advanced packaging as the best path forward for improving performance and reducing power. Over the past four years, which is when 2.5D and fan-out wafer-level packaging first really began garnering interest, these and othe... » read more

What’s Missing In Packaging


The growth of advanced packaging on the leading edge of design is inching backwards into older nodes. With most technology—tools, methodologies, materials and processes—this is business as usual. But in packaging, it's both counterintuitive and potentially problematic. The main reason that companies began investing in advanced packaging—OSATs, foundries, chipmakers such as Intel and Qu... » read more

The Chiplet Option


All of the leading chipmakers, foundries and OSATs are now working with some sort of advanced packaging. The next step is to add some consistency to those efforts to be able to assemble chips much more quickly and inexpensively. DARPA has been promoting chiplets as the best way to solve this problem, and for the military, this is a pretty logical choice. With a push toward heterogeneity in c... » read more

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