Implementing Memory Encryption To Protect Data In Use

By Rocky Zhang - 11 Jul, 2022 - Comments: 0

In my blog “The Methods of Memory Encryption to Protect Data in Use,” I discussed how the XTS/XEX mode of encryption was the appropriate choice for protecting data stored in and accessed from memory, also known as, protecting data in use. As a quick recap, XTS/XEX uses two keys, one key for block encryption, and another key to process a “tweak.” The tweak ensures every block of memory i... » read more

The Methods Of Memory Encryption To Protect Data In Use

By Rocky Zhang - 06 Jun, 2022 - Comments: 0

In my blog “The Importance of Memory Encryption for Protecting Data in Use,” I discussed the growing industry consensus on the imperative of incorporating memory encryption in computing architectures. In part two of this series, I’ll explore the cipher algorithms and modes that can be used to protect data stored in and accessed from memory, or in other words, used to protect data in use. ... » read more

The Importance Of Memory Encryption For Protecting Data In Use

By Rocky Zhang - 05 May, 2022 - Comments: 0

Nowadays, as SoC (System-on-a-Chip) systems become more and more complex, security functions must grow accordingly to protect the semiconductor devices themselves and the sensitive information residing on or passing through them. While a Root of Trust security solution built into the SoCs can protect the chip and data resident therein (data at rest), many other threats exist which target interc... » read more

Setting The Standard For Automotive Security

By Bart Stevens - 07 Apr, 2022 - Comments: 0

Vehicle systems and the semiconductors used within them are some of the most complex electronics seen today. In the past, electronics going into vehicle systems implemented flat architectures with isolated functions controlling various components of the power train and vehicle dynamics. These electronic systems communicated primarily through legacy bus interconnect protocols, like controller ar... » read more

DPA Countermeasures Done Right

By Bart Stevens - 03 Mar, 2022 - Comments: 0

In the late nineties, Paul Kocher, Josh Jaffe, and Ben Jun published a paper that caused many across industry sectors to reconsider what cryptographic implementations should look like. They described an exploit wherein an adversary could extract secrets from a device by analyzing the power consumption or electromagnetic emittance from the device when it was executing cryptographic operations. S... » read more

Building A Defense In Depth Against Cyberattacks

By Bart Stevens - 03 Feb, 2022 - Comments: 0

As the number and type of cyberattacks, from the “simple and cheap” to the “expensive and sophisticated,” continues to grow at a dramatic pace, protection of chips and devices must employ a defense in depth strategy. In this way, if an attacker successfully bypasses a mechanism of protection, they’ll face another layer of defense, rather than a clear path to the assets they seek to ex... » read more

Security Starts With A Threat Assessment

By Bart Stevens - 06 Jan, 2022 - Comments: 0

Developing the security architecture for an electronic device begins with building a threat model wherein we ask these questions: What is the operational environment in which the device needs to function? What type of attacks can be identified? What level of access does a potential attacker have to the device? What possible attack paths can an attacker exploit? What resources (... » read more

Architecting Hardware Protection For Data At Rest And In Motion

By Bart Stevens - 02 Dec, 2021 - Comments: 0

Planning the security architecture for any device begins with the threat model. The threat model describes the types of attacks that the device or application may face and needs to be protected against. It is based on what attackers can do, what level of control they have over the product (i.e., remote or direct access), and how much effort and money they are willing and able to spend on an att... » read more

Implementing Secure Boot With A Root Of Trust

By Bart Stevens - 04 Nov, 2021 - Comments: 0

A boot sequence describes the initial set of operations performed by a device at the start of the boot process. During this stage, available resources reside in some form of local, nonvolatile storage that is readily accessible by the device. The entity initiating the startup sequence is known as a boot loader (or bootstrap loader). The boot loader enables forward progression throughout the ... » read more

Navigating The Seas Of FIPS 140-2 CMVP With Certified Root Of Trust And TRNG IP

By Bart Stevens - 07 Oct, 2021 - Comments: 0

No captain worth his salt would set sail without an experienced navigator at his side. Likewise, when navigating the FIPS 140-2 CMVP process, it’s extremely valuable to have a partner that has already successfully made the journey. More specifically, working with a partner that offers CMVP-certified IP can streamline the process and increase the success of achieving CMVP certification of chip... » read more

← Older posts Newer posts →

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

category: Security Matters

category: IoT, Security & Automotive