About The SweRV Core EH2


In mid-May, CHIPS Alliance announced the open sourcing of the SweRV Core EH2 and SweRV Core EL2 designed by Western Digital. These cores, as well as the earlier EH1, are now supported by Codasip’s SweRV Core Support Package which provides all of the components necessary to design, implement, test, and write software for a SweRV Core-based system-on-chip. But what is SweRV Core EH2? ... » read more

Setting Up An Embedded Development Board For Cloud-Based IoT Service


Everyday there are new devices appearing in homes, offices, hospitals, factories and thousands of other places that are part of the Internet-of-Things (IoT). Clearly, they need to be connected to the internet and there is a need for a huge amount of raw data to be collected, stored and processed on the cloud. There are many data centers available to store the data. However, only some provide... » read more

Real Highlights For Virtual DAC 2020


My first time at DAC was in 2006 in San Francisco. I was mesmerized by it: so many people, so much cool technology, so much fun with weird giveaways, raffles, happy hours, the Denali party and Disco Inferno at the legendary Fillmore. DAC is the most important, comprehensive conference for anyone developing integrated circuits (ICs) and systems-on-chips (SoCs). With an incredible list of ... » read more

Wi-Fi 6 For Low-Power IoT


The internet of things, known as the IoT, is a rapidly growing market, and no surprise. While some question the need to connect everything to the internet, if it’s simple and cost-effective it’s a no brainer. Wireless sensors are a case in point. You can monitor equipment to detect any indication of equipment failure, check temperatures in your restaurant to ensure your fridge remains co... » read more

Imagination’s Approach To Business In China


In my role as Imagination’s CSO, I have been asked several times today whether Imagination would hive off its China operations into a China JV. My first response to this question is “Why?” And this generates several responses.  The conversation goes something like this: “Because you have to!” No, not at all. Nobody has asked us to do that – we can transact business in China ... » read more

Building Your Own NoC And The Hazards Of (Not) Changing


There is a perennial challenge that all R&D organizations face – how much of what we develop is essential to our competitive advantage and how much can be acquired at lower cost and risk rather than built from scratch? It’s easy to believe in the heat of battle that everything we are doing must be crucial. But the world continues to change around us. What was optional yesterday may be e... » read more

A Different View On Debugging


The classic approach to improve an engineering task that is becoming too complex due to its size and detail is to raise the abstraction of design representation. In this way we plan cities, build aircraft and plan 500M gate SoCs. For example, there is no way an ASIC design could go beyond a few thousand logic gates without shifting abstraction to the Register Transfer Level (RTL) and leveragin... » read more

Why Cyberattacks Will Be No Match For Autonomous Vehicles


Malware, ransomware, viruses, denial-of-service attacks – these threats can leave a business reeling as it struggles to recover. Others might not recover at all, but that hasn’t stopped most industries from treating cybersecurity as an afterthought. Unfortunately, this is how it has been handled since the first hackers emerged. It’s only when a company is hit that other players start to r... » read more

Connecting Emulated Designs To Real PCIe Devices


These days verification teams no longer question whether hardware assisted verification should be used in their projects. Rather, they ask at which stage they should start using it. Contemporary System-on-Chip (SoC) designs are already sufficiently complex to make HDL simulation a bottleneck during verification, without even mentioning hardware-software co-verification or firmware and softwa... » read more

Domain-Specific Processors Enable More Than Moore


Last month was the 55th anniversary of Gordon Moore’s famous paper Cramming more components onto integrated circuits. He took a long-term view of the trends in integrated circuits being implemented using successively smaller feature sizes in silicon. Since that paper, integrated circuit developers have been relying on three of his predictions: The number of transistors per chip increas... » read more

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