Verification Requirements For 5G To Enable A Perfect Storm Of New Applications


In my role as product management lead, to understand drivers for verification requirements and semiconductor markets I often exchange thoughts with customers what they think the next “killer app” would be. Ten years back, the drivers seemed pretty clear and segmented on a small number of applications, but the outlook today in 2019 is much more diverse. 5G networking seems to be a binding el... » read more

Which Glitch Is Which?


Glitch is a commonly used term in modern vernacular, used to identify unexpected problems in everything from the space race, web site down time, or a crash of your latest mobile phone app. In electronics design glitch has a more specific meaning, referring to unnecessary signal transitions in a combinational circuit. Eliminating this extra switching activity can save power consumption, especial... » read more

Taking EDA To The Cloud


By now, virtually everyone knows about the “cloud”—that amorphous delivery of computing services over the Internet. Servers, storage, databases, networking, software, analytics, intelligence, and more are all on offer. Clouds may be private and limited to a single organization (enterprise clouds), be available to many organizations (public cloud), or a combination of both (hybrid cloud). ... » read more

Memory IP: From Cobblestone To Cornerstone


Embedded, on-chip SRAM has been a fundamental building block for custom and standard chips for quite a while. When all this began, there were typically small SRAM blocks of on-chip memory supplemented by off-chip DRAM devices. Those off-chip devices became more sophisticated, with higher performance interfaces (e.g., GDDR6) or new form factors (e.g., HBM2 3D memory stacks). The on-chip memory p... » read more

Optimize MATLAB C/C++ Code For HLS


A common use case for high-level synthesis (HLS) is taking 3rd party generated or legacy C/C++ algorithms and converting the algorithm to a hardware implementation using an HLS compiler. This can present many challenges to the developer since there is little insight or understanding of the underlying code. In a recently published white paper, we examine how SLX FPGA is used to take a MATLAB... » read more

Enabling The RISC-V Ecosystem


Earlier this year, OneSpin’s Sven Beyer discussed the emerging RISC-V processor and some of its verification challenges. He stated that “RISC-V is hot and stands at the beginning of what may be a major shift in the industry.” In the few intervening months, it has become even more apparent that RISC-V is fundamentally changing system-on-chip (SoC) development. Dozens of commercial and open... » read more

Automation And Correct By Construction Will Empower 3D-IC Adoption


When research on 3D ICs was in full swing around 2009, I had been researching on how through-silicon-via (TSV) was related to thermal in a semiconductor chip-making company, and it seemed logical that 3D ICs would become mainstream. However, during the past 10 years, use of 3D stacked die has been applied to only a few applications, such as memory or image sensors, and the 2.5D solution using i... » read more

Providing An AI Accelerator Ecosystem


A key design area for AI systems is the creation of Machine Learning (ML) algorithms that can be accelerated in hardware to meet power and performance goals. Teams designing these algorithms find out quickly that a traditional RTL design flow will no longer work if they want to meet their delivery schedules. The algorithms are often subject to frequent changes, the performance requirements may ... » read more

Intelligent System Design—Why The Future Does Need Us!


The month of June 2019 was very inspiring. At the Design Automation Conference (DAC) in Las Vegas, Cadence launched the next phase of our system-level strategy, dubbed “Intelligent System Design.” Later in the month I got to meet some real-life astronauts at the Paris Air Show in Le Bourget—where we exhibited this year for the first time. All of this made me think about the future. Coinci... » read more

Google Cloud—A View From The Top


I recently had the opportunity to attend a retreat-style event in Napa Valley hosted by the Google Cloud team. Like many such events I’ve attended over the years, the guests were treated to excellent accommodations, fabulous food, a good amount of free time for networking or to partake in activities, relevant and on-point presentations and world-class wine (this is Napa Valley after all). All... » read more

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